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Observer sigan
Observer
522 Views
Registered: ‎05-28-2019

ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi, I'm following the "HDMI FrameBuffer Example Design 2018.3" to try to build and run the example design on a ZCU102 board.

I'm running:
Vivado v2018.3 (64-bit)
SW Build: 2405991 on Thu Dec 6 23:36:41 MST 2018
IP Build: 2404404 on Fri Dec 7 01:43:56 MST 2018

OS:
Ubuntu 16.04 LTS running on VirtualBox

Example project:
zcu102_hdmi_8b_exdes_2018_3.zip

I have trouble under section 4.2.1 when i click the "Generate Bitstream".
The synthesis fails for component dmi_example_zcu102_v_hdmi_tx_ss_0_synth_1

Log:
*** Running vivado
with args -log hdmi_example_zcu102_v_hdmi_tx_ss_0.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source hdmi_example_zcu102_v_hdmi_tx_ss_0.tcl

****** Vivado v2018.3 (64-bit)
**** SW Build 2405991 on Thu Dec 6 23:36:41 MST 2018
**** IP Build 2404404 on Fri Dec 7 01:43:56 MST 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

source hdmi_example_zcu102_v_hdmi_tx_ss_0.tcl -notrace
WARNING: [Vivado 12-818] No files matched '/home/sigurd/fpga/zcu102_hdmi_8b_exdes_2018_3/pl/hdmi_project/hdmi_example_zcu102.srcs/sources_1/bd/hdmi_example_zcu102/ip/hdmi_example_zcu102_v_hdmi_tx_ss_0/bd_0/ip/ip_1/bd_720f_v_tc_0_clocks.xdc'
ERROR: [Common 17-55] 'set_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
INFO: [Common 17-206] Exiting Vivado at Wed Jun 26 15:41:43 2019...

The file that cannot be matched in the warning does exist.

Looking up the Tcl script that fails:
$>find ./ -name "hdmi_example_zcu102_v_hdmi_tx_ss_0.tcl"
./fpga/zcu102_hdmi_8b_exdes_2018_3/pl/hdmi_project/hdmi_example_zcu102.runs/hdmi_example_zcu102_v_hdmi_tx_ss_0_synth_1/hdmi_example_zcu102_v_hdmi_tx_ss_0.tcl

The Tcl line that fails:
$>cat ./fpga/zcu102_hdmi_8b_exdes_2018_3/pl/hdmi_project/hdmi_example_zcu102.runs/hdmi_example_zcu102_v_hdmi_tx_ss_0_synth_1/hdmi_example_zcu102_v_hdmi_tx_ss_0.tcl | grep bd_720f_v_tc_0_clocks.xdc
set_property used_in_implementation false [get_files -all /home/sigurd/fpga/zcu102_hdmi_8b_exdes_2018_3/pl/hdmi_project/hdmi_example_zcu102.srcs/sources_1/bd/hdmi_example_zcu102/ip/hdmi_example_zcu102_v_hdmi_tx_ss_0/bd_0/ip/ip_1/bd_720f_v_tc_0_clocks.xdc]

Running the Tcl line in Tcl Console in Vivado:
get_files -all /home/sigurd/fpga/zcu102_hdmi_8b_exdes_2018_3/pl/hdmi_project/hdmi_example_zcu102.srcs/sources_1/bd/hdmi_example_zcu102/ip/hdmi_example_zcu102_v_hdmi_tx_ss_0/bd_0/ip/ip_1/bd_720f_v_tc_0_clocks.xdc
/home/sigurd/fpga/zcu102_hdmi_8b_exdes_2018_3/pl/hdmi_project/hdmi_example_zcu102.srcs/sources_1/bd/hdmi_example_zcu102/ip/hdmi_example_zcu102_v_hdmi_tx_ss_0/bd_0/ip/ip_1/bd_720f_v_tc_0_clocks.xdc

What could be the problem?

I found this thread https://forums.xilinx.com/t5/Video/TCL-Script-for-DisplayPort-1-4-Pass-Through-Example-gives-some/m-p/940857 with the same problem that was solved by creating a new Ubuntu user. This did not help in my case :(

Help will be very much appreciated!

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14 Replies
Moderator
Moderator
484 Views
Registered: ‎10-04-2017

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

SK - Edited - Adding link to design:

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/33128528/HDMI+FrameBuffer+Example+Design+2018.3

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Xilinx Video Design Hub
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Registered: ‎10-04-2017

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @sigan,

 

I downloaded and built the project on my side without any issue.

I checked and the file that you are missing does exist on my side.

<project_location>/zcu102_hdmi_8b_exdes_2018_3/pl/hdmi_project/hdmi_example_zcu102.srcs/sources_1/bd/hdmi_example_zcu102/ip/hdmi_example_zcu102_v_hdmi_tx_ss_0/bd_0/ip/ip_1 $ vim bd_720f_v_tc_0_clocks.xdc 

Few questions:

If you look at the block design in IPI, does it validate correctly?

When you ran the inital command, did you recieve any errors or warnings?

<project_location>zcu102_hdmi_8b_exdes_2018_3/pl $ vivado -s ./design/setup.tcl 

 

 

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Xilinx Video Design Hub
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Registered: ‎11-09-2015

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @sigan 

Do you have any updates on this? Are you still experiencing this issue?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer sigan
Observer
348 Views
Registered: ‎05-28-2019

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @samk , thanks a lot for looking into this!

The file also exists on my side if I use the terminal to look for it. I seems to me that the TCL console cannot see it during the building process for some reason.

The IP Integrator block diagram looks fine to me, see screen dump below.

ipi_diagram.png

I get no warnings or errors in the terminal when I run the initial command "vivado -s ./design/setup.tcl". I do get some warnings in Vivados messages panel, see screen dump below.

messages_warnings.png

Thanks a lot once more for helping me with this!

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Moderator
Moderator
329 Views
Registered: ‎10-04-2017

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @sigan,

 

No problem, happy to help.

I am wondering if something got corrupted on your side, can you re unzip and then rebuild in a new directory?

Also, please send me your files and I can test on my side. I will send a transfer request shortly.

 

Thanks,

Sam

 

 

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Registered: ‎10-04-2017

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @sigan,

 

I ran your design on my side without any issues.

 

 

Welcome to Ubuntu 16.04.3 LTS (GNU/Linux 4.4.0-154-generic x86_64)
...

****** Vivado v2018.3 (64-bit) **** SW Build 2405991 on Thu Dec 6 23:36:41 MST 2018 **** IP Build 2404404 on Fri Dec 7 01:43:56 MST 2018

 

Can you please try unzipping and running in a new directory?

Also, can you try building the bare-metal HDMI example design described in chapter 5 of the HDMITX/RX pgs? I want to check and see if this is a license issue.

Thanks,

Sam

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Observer sigan
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Registered: ‎05-28-2019

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @samk, I have tried unzipping and running in a new directory, unfortunately it still fails.

Also checked License Status for both HDMI 1.4/2.0 TX and RX subsystem. All features listed return Bought.

Tried to run the example project for HDMI 1.4/2.0 TX Subsystem. Vivado unexpectedly exits when trying to run synthesis, see terminal output below.

****** Vivado v2018.3 (64-bit)
**** SW Build 2405991 on Thu Dec 6 23:36:41 MST 2018
**** IP Build 2404404 on Fri Dec 7 01:43:56 MST 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

start_gui
Abnormal program termination (11)
Please check '/home/barco/fpga/hdmi_example/v_hdmi_tx_ss_0_ex/hs_err_pid3152.log' for details

barco@barco:~/fpga/hdmi_example$
barco@barco:~/fpga/hdmi_example$ cat /home/barco/fpga/hdmi_example/v_hdmi_tx_ss_0_ex/hs_err_pid3152.log
#
# An unexpected error has occurred (11)
#
Stack:
/tools/Xilinx/Vivado/2018.3/tps/lnx64/jre9.0.4/lib//server/libjvm.so(+0xb6aadb) [0x7efd33ecaadb]
/tools/Xilinx/Vivado/2018.3/tps/lnx64/jre9.0.4/lib//server/libjvm.so(JVM_handle_linux_signal+0xbb) [0x7efd33ecfe1b]
/tools/Xilinx/Vivado/2018.3/tps/lnx64/jre9.0.4/lib//server/libjvm.so(+0xb647b8) [0x7efd33ec47b8]
/lib/x86_64-linux-gnu/libc.so.6(+0x354b0) [0x7efd786474b0]
/tools/Xilinx/Vivado/2018.3/lib/lnx64.o/Ubuntu/libstdc++.so.6(_ZTVN10__cxxabiv121__vmi_class_type_infoE+0x10) [0x7efd78f645d8]

Could I have done something wrong when installing the Xilinx HLx Design Tools?

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Moderator
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Registered: ‎10-04-2017

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @sigan,

 

At this point, your install seems like a possibility.

Depending on how hard this is to do I think re-installing is worth a shot, but before you do, use the MD5 value to check to make sure your download was not corrupted.

The MD5 value is located under the download link.

 

 

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Observer sigan
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Registered: ‎05-28-2019

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @samk, it seems that I did not install the required Flex library version 11.14.1.0 .I must have overlooked it in the setup dialog the last time I installed the Vivado software.

Where do I unpack the library to make sure Vivado sees it?

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Registered: ‎06-14-2010

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hello @sigan ,

In relation to the Flexlm licensing utilities v11.14.1, you obtain these utilities from the downloads page (https://www.xilinx.com/support/download.html) and provide the .zip file to your floating license admin (please note that there are utilities specifically for Windows OS and also separately – for Linux). Then ask the admin to unzip this anywhere on the server. Then he/she needs to start the floating license server using the lmgrd from this location where he/she has just unzip these. It will then in turn call the xilinxd vendor daemon (also found from the same location as lmgrd v11.14).  And that is it then, your Vivado 2018.3 will then be able to successfully detect and check out the necessary license and your issue should be resolved then.

Hope this helps.

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
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Observer sigan
Observer
186 Views
Registered: ‎05-28-2019

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi, here comes a status update on this.

The license servers we have are running version v11.14.1.0, so that does not seem to be the issue.

Did the following:

1) Re-installed Ubuntu 16.04.4 LTS.
2) Re-installed Xilinx_Vivado_SDK_2018.3_1207_2324.tar.gz (checked the md5sum)

This is how Vivado was installed:
$>tar -xzvf Xilinx_Vivado_SDK_2018.3_1207_2324.tar.gz
$>sudo ./xsetup
Chose "Vivado HL System Edition".
Get the message at the end of installation "Installation completed successfully!"
Change permission on my users .Xilinx catalog:
$>sudo chown -R user:user .Xilinx

Then I source the Vivado settings like this:
$>source source /tools/Xilinx/Vivado/2018.3/settings64.sh

And start Vivado and setup example design like this:
$>vivado -s ./design/setup.tcl

The Xilinx design suite was installed here:
/tools/Xilinx/

The project is located here:
/home/user/fpga/zcu102_hdmi_8b_exdes_2018_3

Am I doing the installation wrong?

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Registered: ‎06-14-2010

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hello @sigan ,

The installation seems to be fine in your case.

Can you please explain what exact error or incorrect behaviour are you reporting here? I've read all of the notes and a bit confused what is the actual issue in this case? Can you confirm on this please? Thanks a lot in advance.

Can you please open your Vivado 2018.3 and do report_ip_status and then see if a valid license is listed for both the RX an TX HDMI  IP cored in the list?

You should see Purchased and not e.g. Design Entry (see my example screenshot below for one of the Video IP Core). Please send me a similar screenshot that you see at your end.

image.png

I just want to eliminate the possibility that this is an issue due to licensing. Thanks in advance.

Also, can you please open a command prompt and CD to the location such as e.g.: ../xilinx/Vivado/2018.3/bin/unwrapped/lnx64.o

Then, from here, please run this command: lmutil lmstat –a –c <port_number>@<server_name> -I (e.g. lmutil lmstat –a –c 2100@ANATOLI_PC -i)

Then please see if lmgrd is UP and xilinxd is UP too and then, see what version of flexlm utilities the server is/was started with? Do you see v11.14 for both lmgrd and xilinxd?

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
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Moderator
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Registered: ‎10-04-2017

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @sigan,

 

Were you able to solve the issue?

If so can you let us know what the issue was?

 

Thanks,

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Xilinx Video Design Hub
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Observer sigan
Observer
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Registered: ‎05-28-2019

Re: ZCU102 HDMI FrameBuffer Example Design 2018.3 WARNING: [Vivado 12-818]

Hi @samk & @anatoli

I have not been able to solve the issue. I'm working around it by building HDMI example designs from scratch via the IP Catalog on Windows.

Will post here again when I get the time to look at the post from @anatol . Hopefully by the end of this week :)

Thanks once again for all the help, really appreciate it!

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