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Contributor
Contributor
258 Views
Registered: ‎02-24-2019

[bug] hdmi-out project had generated numerous green broken lines when implemented using vivado 2019.1

hdmi-out project had generated numerous abnormal green broken lines when implemented using vivado 2019.1

WhatsApp Image 2019-07-12 at 6.32.09 PM.jpeg

 

When implemented using vivado 2017.4, no abnormal green broken lines were  found. Any pointers on how to solve this problem?

WhatsApp Image 2019-07-12 at 6.32.10 PM.jpeg

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3 Replies
Moderator
Moderator
219 Views
Registered: ‎11-09-2015

Re: [bug] hdmi-out project had generated numerous green broken lines when implemented using vivado 2019.1

HI @eewse 

You are not giving any information about what you are doing...

  • What is the design you are starting from?
  • On which board?
  • Did you made any modification to it?
  • Is there any UART output?
  • Are you using the HDMI TX subsystem? Or is it using the AXI4-Stream to video out?

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Scholar watari
Scholar
202 Views
Registered: ‎06-16-2013

Re: [bug] hdmi-out project had generated numerous green broken lines when implemented using vivado 2019.1

Hi @eewse 

 

Would you share the followings, if possible ?

 

- Clock jitter value or waveform on HDMI clock

- Measure eye pattern on HDMI data signals

- Share video format on this HDMI signal. (YUV or RGB or other...)

- Do you use certified HDMI cable ?

  => I suggest you to use 4K certified HDMI cable.

 

Best regards,

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Moderator
Moderator
150 Views
Registered: ‎11-09-2015

Re: [bug] hdmi-out project had generated numerous green broken lines when implemented using vivado 2019.1

Hi @eewse 

Do you have any update on this?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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