07-12-2017 12:07 PM
07-13-2017 01:05 AM
Is it you own design or did you use an example design (in vivado 2017.1/2017.2) with a xilinx board?
07-13-2017 05:48 AM
I am using the example design and HDMI rx driver is written by the Xilinx guys.
07-13-2017 05:58 AM
I am using the example design
Could you give more detail, this way we can try to reproduce the issue:
07-13-2017 06:30 AM
07-13-2017 07:08 AM
You should use 2017.1 or 2017.2. As you can see in the AR#69055, there are lot of fixes in the IP.
In this version you can generate the example design by right clicking on the IP.
The XAPP1287 you are using is obsolete.
07-13-2017 07:12 AM
The reference design was created and built using the Vivado® Design Suite, System Edition 2016.2.
07-13-2017 08:12 AM
Please use 2017.1 or 2017.2:
07-17-2017 06:11 AM
07-17-2017 06:26 AM
07-17-2017 09:59 AM
07-17-2017 12:41 PM
07-18-2017 01:55 AM
07-18-2017 03:01 AM - edited 07-18-2017 03:03 AM
We just tested 2160p60 YCbCr 4:2:2 12bpc with QD780D, (VIC 97), on KC705 board, it's working fine.
07-18-2017 06:18 AM
Here I do the screen shot of the software running, once first I connect the HDMI 4:2:2 ,2160p60 and the software doesn't detect the inputs " The System ID <121> is not supported " , then I changed the inputs to 420 and set again to 422, it is obvious from the figure in this time the software be able to detect the 422,2160p60.
07-18-2017 07:32 AM
I am exciting how you got the YCbCr 4:2:2 12bpc, have you used the HDMi rx Open Ip example or did you modify some parts, I don't know why the software stuck with this comment "The stream ID <> is not supported", have you ever seen this thing once you have tested 2160p60 YCbCr 4:2:2.
KC705 board and QD780E are my equipment.
any help would be appreciated .
07-18-2017 10:02 AM
07-19-2017 06:08 AM
@xud, @florentw Do you have any idea why the software can not be able to detect the HDMI 4:2:2 ,2160p60 for the first time, this bug is still inside the core for xilinx and they didn't solve it yet, @xud I am pretty sure once you program the device and run the software for 4:2:2 ,2160p you will see that the software can not detect this input mode, but if you do the switching mode and return back to 422,2160p software be able to detect it in this time. see the screen shot that shows this bug ...
07-20-2017 01:16 AM
Which version of Vivado are you using? This error message should have been fixed in the latest example design. I saw similar message in old release(can't remember the exact version).
I tested on KC705 and KCU105 with 2017.1 example design, didn't see this issue. Please refer to attached log file.
Please follow chapter 5 of PG235(or PG236) to generate a fresh example design in v2017.2. If you still see this issue, please open a SR via Service Portal :
We will assist you further.
07-20-2017 06:04 AM
Thank you for your response. In fact I followed exactly the chapter 5 from PG236 for HDMI RX, and the vivado version that I use is 2017.2, I tested on KC705 evaluation board and quantumdata 780E is the HDMI source. The only different that I seen with your test is number of Pixel Per Clock for you is set to 2 but in my side is 4.
I put the chipscope in the design to see what happen when I put at the begging the HDMI to 422,2160p60, 12bpc and 4 PPC, I see the video output stream for HDMI RX core in the design is off, while this output must be had video stream data. Also I read all register space in VPHY control core I realized that the register 158(HDMI RX TMDS Clock Output) is 0 means that is disable also register 104 (RX Status) is zero. while these registers when the system is working must have value 158=0x00000001, 104=0x00010101.
as a conclude, in some way the rx side is shutdown when HDMI input is set to 422,2160p60, 12bpc and 4 PPC at the first try. but when even HDMI input changes to 422,2160p30, 12bpc and 4 PPC software can detect the input and the interesting thing is that when you change back to 422,2160p60, 12bpc and 4 PPC in this time software can detect the input and those registers mentioned have a good value.
any help would be appreciated.