CLKIN requirements for GTP Rocket IO configured for PCIe

[srikanthneelam]

Hi,

We are using the Vertex 5 FPGA's GTP rocketIO's for PCIe endpoint.  The design works absolutely fine when the CLKIN is fed with the Reference Clock
Differential from the PCIe connector but not when the clock is derived from some other source

Kindly clarify if the Xilinx SERDES can/cannot work if the clock source is other than the Reference clock from the PC.

Regards,

Srikanth 

[mcgett]

The GTPs can work with any quality differential clock source that has been AC coupled.

The standard system topology for PCIe is to use the same reference clock source for both the upstream and downstream points.

A PCIe system should be able to tolerate a 100ppm difference in the reference clock sources.