03-08-2011 11:03 PM
03-09-2011 08:09 AM
The TXP/TXN and RXP/RXN pins of MGTs are fixed dedicated logic and cannot be arbitrarily assign the pins or combine them together as you can with general purpose IOs.
Read the GTP User Guide for the family that you are using and look for information on the loopback modes that are available.
03-09-2011 08:50 AM
Then what should I do if the board I am trying to use already has the connectivity to the neighboring ASICs on this interface, but the logic I am trying to build doesn't have this GT* IP?
The options I have are:
1) Leaving the I/O open & hope that other ASIC doen't get into trouble because of this.
2) Loopback Rx to Tx so that ASIC sees what it is sending.
Which one is the preferred method?
I already looked at all the user guides/ref manuals for Virtex-5 & all of the postings related to the pack Error I am seeing. No luck so far & hence I am posting this question here looking for solution.
03-09-2011 02:19 PM