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Visitor
Visitor
5,148 Views
Registered: ‎03-08-2011

How to loopback without GTP_DUAL

My current design has GTP_DUAL cores driving the differential I/O's. I want to replace the GTP_DUAL core with a simple loopback buffers so that I can turn around the differential data received back to the differential transmitter output. I am trying to reuse an existing board that has Xaui I/F. But for my current application I don't need the Xaui functionality. I am trying to load an image that has a different funcationality & hence want to terminate the already existing Xaui interface on the board gracefully. Hence instead of leaving the pins floating I would like to loopback the Received data back to Transmit so that neighbouring ASIC device gets what it is sending! I understand that these Difeerantial I/O's are special. But is there a simple way to achieve this loopback without having to use the GT* instances & then use the loopback functionality supported inside them? I tried looping back the differential Input port signals directly back to the differential outputs like this: IBUFDS P0_RX_P_0_inst (.I(P0_RX_P[0]), .IB(P0_RX_N[0]), .O(P0_RX_0_wire)); OBUFDS P0_TX_P_0_inst (.O(P0_TX_P[0]), .OB(P0_TX_N[0]), .I(P0_RX_0_wire)); obviously it didn't work & I am getting "Pack:1107 " error from the mapper :-( ************************************************************************************************************************************* ERROR:Pack:1107 - Pack was unable to combine the symbols listed below into a single IOB component because the site type selected is not compatible. Further explanation: The component type is determined by the types of logic and the properties and configuration of the logic it contains. In this case an IO component of type IOB was chosen because the IO contains symbols and/or properties consistent with input, output, or bi-directional usage and contains no other symbols or properties that require a more specific IO component type. Please double check that the types of logic elements and all of their relevant properties and configuration options are compatible with the physical site type of the constraint. Summary: Symbols involved: PAD symbol "P0_RX_N[0]" (Pad Signal = P0_RX_N[0]) SlaveBuffer symbol "mm_unused_io/P0_RX_P_0_inst/SLAVEBUF.DIFFIN" (Output Signal = mm_unused_io/P0_RX_P_0_inst/SLAVEBUF.DIFFIN) Component type involved: IOB Site Location involved: A8 Site Type involved: IPAD ************************************************************************************************************************************* How do I achieve my goal of loopback the received data back to the source without adding lot of logic?
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Xilinx Employee
Xilinx Employee
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Registered: ‎01-03-2008

The TXP/TXN and RXP/RXN pins of MGTs are fixed dedicated logic and cannot be arbitrarily assign the pins or combine them together as you can with general purpose IOs.

 

Read the GTP User Guide for the family that you are using and look for information on the loopback modes that are available.

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Visitor
Visitor
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Registered: ‎03-08-2011

Then what should I do if the board I am trying to use already has the connectivity to the neighboring ASICs on this interface, but the logic I am trying to build doesn't have this GT*   IP?

 

The options I have are:

1) Leaving the I/O open & hope that other ASIC doen't get into trouble because of this.

2) Loopback Rx to Tx so that ASIC sees what it is sending.

Which one is the preferred method?

 

 

I already looked at all the user guides/ref manuals for Virtex-5 & all of the postings related to the pack Error I am seeing. No luck so far & hence I am posting this question here looking for solution.

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Anonymous
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You still need to instantiate the GTPs in your design in order to use the loopback functionality. Instantiate the GTP in your design. Then look in the loopback section of the V-5 GTP users guide (do a search for "loopback" and this will take you there). Follow the usage instructions there to enable the loopback settings of the GTP. Just so that its clear, you should be looking the this users guide:

http://www.xilinx.com/support/documentation/user_guides/ug196.pdf
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