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Newbie
Newbie
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Registered: ‎10-27-2014

Jtag extest for Virtex 5

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Hi,

I am making Jtag test with XC5VSX95T_FF1136.

The BYPASS & IDCODE instruction works well. But when I switch to EXTEST mode, there is no data on the TDO.

So I noticed the following lines in ug191 guides:

" If Boundary-Scan is used as part of the product verification in the LXT or SXT, the analog
supply voltage pin MGTAVCC of all GTP_DUAL tiles must be powered. The analog
supply voltage pin MGTAVCC of all unused GTP_DUAL tiles must be connected to the
same supply that supplies VCCINT, which is the power supply pin for the internal core
logic.
"

These pins on my board goes to GND, so I wonder is this the main reason for EXTEST failure?

 

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Moderator
Moderator
17,720 Views
Registered: ‎01-15-2008

Re: Jtag extest for Virtex 5

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yes for extest you will need to power the MGTAVCC supply for each GTP_DUAL in the column. 

check  the following AR

http://www.xilinx.com/support/answers/29766.html

 

 

--Krishna

 

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Highlighted
Moderator
Moderator
17,721 Views
Registered: ‎01-15-2008

Re: Jtag extest for Virtex 5

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yes for extest you will need to power the MGTAVCC supply for each GTP_DUAL in the column. 

check  the following AR

http://www.xilinx.com/support/answers/29766.html

 

 

--Krishna

 

View solution in original post

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