06-30-2011 08:54 AM
I have a small query regarding the SEU detection and correction followed in Viretx FPGAs.
I see that both Readback CRC and FRAME_ECC are used in Virtex FPGAs. Whiile FRAME_ECC is capable of detecting and correcting single biit errors in the configuration memory frames, why is the Readback CRC available along with it.
My confusion is, as Readback CRC can only detect errors in the frames and ECC can both detect and correc, tehn why use Readback CRC.
Please guide me with your valuable input.
06-30-2011 11:51 AM
06-30-2011 11:53 AM
06-30-2011 09:50 PM