06-05-2011 03:43 AM - edited 06-05-2011 03:59 AM
I’m new in Xilinx forums and Xilinx working
In fact, my goal is to try a hardware co-simulation (Simulink/Xilinx) on my ML505 (Xilinx XUPV5-LX110T) board, and I’m still in the step of board-PC wiring, I still try to communicate them through an Ethernet cable, so I’m in the initial step,
I did all the indicated steps in the System Generator for DSP User Guide v12.4 (I followed the same steps as Installing an ML506 Board for Ethernet Hardware Co-Simulation):
- I configured my IP address on 192.168.8.2
- I formatted the flash card with FAT16 and I unzipped the ML506_sysace_cf.zip file inside the card: so in the flash card we find : cfg.dat, ip.dat, mac.dat, xilinx.sys and a folder named “hwcosim”, in this folder we find too sub-folders named “dut” and “boot4” that contains respectively dut.ace and boot4.ace
- I set the Configuration Address DIP Switches as follows: 1:on, 2:off, 3:off, 4:on, 5:off, 6:on, 7:off, 8:on
- I set the Ethernet Mode Select jumpers as shown in the attached picture (the default position of jumpers) which is the same picture at the page 293 of System Generator for DSP User Guide v12.4
- I installed the Ethernet RJ45 male/male straight cable.
Normally, if all is well done, the MAC and IP addresses of the board will be displayed on the LCD displayer. But I have nothing and even when I pressed the System ACE™ Reset button to reconfigure the FPGA. And worse, the Error LED in the board glows red, what means really I have an error in my configuration process.
I’m totally blocked, please if someone has any idea to correct.
Please it's very urgent, if anyone has a comment !
Thank you in advance,
06-05-2011 06:56 AM
06-05-2011 05:46 PM
Firstly thanks for responding,
- «Start with a simple switch to LED design to simplify things and get this working first. »: it's already done with Xilinx ISE 13
- «You need to get your SystemAce configuration working first. »: does it mean that JTAG configuration cable must be connected during the co-simulation? And if you give me the headnotes of System ACE configuration needed to complete wiring and to begin the Matlab/Xilinx co-simulation.
Thanks in advance
06-05-2011 06:46 PM
> it's already done with Xilinx ISE 13
Did it work? Were you able to successfully create an ACE file, load on the CompactFlash and configure the FPGA?
> : does it mean that JTAG configuration cable must be connected during the co-simulation?
I am not an expert on the HW co-sim methods. My understanding is that the primary method is through JTAG and there are some options for ethernet for some board and design configurations.
> And if you give me the headnotes of System ACE configuration
Start with the ML505 user guide for configuation options.
06-05-2011 11:47 PM
you have a ML505 Board, and tried to configure it with the ML506 ACE-Files.
I doubt that this will work at all, because the boards are equipped with different FPGAs, so the configuration bitstreams are not compatible. (V5LX110 vs. V5SXT50)
As far as I could see the ML505 isn't even a valid standard target for HW-cosimulation, so getting it to work (especially over the network) will be quite complicated.
Have a nice simulation
06-06-2011 02:45 AM - edited 06-06-2011 02:56 AM
Thanks both of you for being so collaborative
"so getting it to work (especially over the network) will be quite complicated" : you think that HW co-sim will be more easier with JTAG connection ?
I have no difference between Ethernet and JTAG connection, my goal is to wire and co-simulate successfully
To all Xilinx employee and Xilinx forums members:
If anyone has an experience with ML505 and exactly XUPV5-LX110T board, please tell me about the easier Board/PC way of connection for a successful HW co-sim
06-06-2011 04:58 AM
Please don't not post the same question on multiple discussion boards in the future. I replied to your original post below: