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Visitor justynnuff
Visitor
3,625 Views
Registered: ‎06-06-2012

Virtex-4 Dual Port Ram Suspected for Pack:679 Error

Hello everyone.  I reluctantly post this here, but I have been searching for days on a solution to this problem. I have found a few differenct scenarios that are close to what I am experiencing, but have not found a solution to this specific problem.

 

We are implementing an OFDM project on a WARP board from Rice university (not important, just wanted to set  up the scenario).  The project compiles and runs fine on their board containing a Virtex2P chip.  They now have a new board that has a Virtex-4 FPGA on it.  We create the models in Simulink and use System Generator to generate the pcores we use in Xilinx Platform Studio to build the project.  Nothing significant has changed in the project from using the Virtex2P board to the Virtex-4, however, upon trying to generate the bitstream, the project fails at the map portion. Specifically, here:

 

#----------------------------------------------#
# Starting program map
# map -o system_map.ncd -pr b -ol high -timing -t 7 system.ngd system.pcf 
#----------------------------------------------#
Release 10.1.03 - Map K.39 (nt)
Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.
PMSPEC -- Overriding Xilinx file <F:/Xilinx/EDK/EDK/data/Xdh_PrimTypeLib.xda>
with local file <f:/Xilinx/ISE/ISE/data/Xdh_PrimTypeLib.xda>
Using target part "4vfx100ff1517-10".
Mapping design into LUTs...
Writing file system_map.ngm...
Running directed packing...
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/hset,
   RLOC=X3Y4) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU10" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<1>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU7" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<0>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU7 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/hset,
   RLOC=X3Y5) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU13" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<2>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU16" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<3>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU16 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/hset,
   RLOC=X3Y8) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU22" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<5>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU19" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<4>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU19 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/hset,
   RLOC=X3Y9) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f
295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU25" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<6>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU28" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/core_doutb<7>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1
d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram3/comp3.core_instance3/BU28 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/hset,
   RLOC=X3Y4) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU7" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<0>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU10" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<1>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU10 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/hset,
   RLOC=X3Y5) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU13" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<2>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU16" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<3>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU16 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/hset,
   RLOC=X3Y8) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU22" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<5>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU19" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<4>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU19 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6
206a/dual_port_ram/comp0.core_instance0/hset,
   RLOC=X3Y9) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU25" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<6>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU28" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/core_doutb<7>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/
chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram/comp0.core_instance0/BU28 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.
ERROR:Pack:679 - Unable to obey design constraints
   (MACRONAME=sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f2
   95b4e48f/chphtrk_a42fd6206a/dual_port_ram2/comp2.core_instance2/hset,
   RLOC=X3Y20) which require the combination of the following symbols into a
   single SLICEM component:
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram2/comp2.core_instance2/BU55" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram2/core_doutb<16>)
   	RAMDP symbol
   "sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/c
   hphtrk_a42fd6206a/dual_port_ram2/comp2.core_instance2/BU58" (Output Signal =
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram2/core_doutb<17>)
   The function generator
   sgrx_plbw_0/sgrx_plbw_0/sysgen_dut/sgrx_x0/rx_cdd1b1d503/chcomp_f295b4e48f/ch
   phtrk_a42fd6206a/dual_port_ram2/comp2.core_instance2/BU58 is unable to be
   placed in the G position because G is already occupied.  Please correct the
   design constraints accordingly.


[More pack679 errors]


Mapping completed.
See MAP report file "system_map.mrp" for details.
Problem encountered during the packing phase.

Design Summary
--------------
Number of errors   :  44
Number of warnings :  35
ERROR:Xflow - Program map returned error code 2. Aborting flow execution... 
make: *** [__xps/system_routed] Error 1
Done!

 

All the errors occer in only one of the custom pcores we use, and I suspect it is related, somehow, to the dual_port_ramx.  Sorry for posting such a vague question, and only submitting the error, but I have been searching for someone with a similar problem for a few days now, and have come across nothing.

 

I am happy to provide any details.

 

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1 Reply
Visitor justynnuff
Visitor
3,610 Views
Registered: ‎06-06-2012

Re: Virtex-4 Dual Port Ram Suspected for Pack:679 Error

The error originally occered because the pcores I first exported targeted the Virtex2P chip.  When I rebuilt them using Sysgen for the Virtex-4 chip, I simply copied and pasted the pcores into the pcore directory of the XPS project and tried  generating the bit stream again.

 

The problem was that I simply tried to regenerating the bit stream.  I forgot to select "clear hardware" before I did so.  It works now.

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