I'd like to make a testbench for one of the vhdl files in the Reference Design File Folder (specifically, MULT18X18_PARALLEL_PIPE.vhd see attached)
Is there anyway I can obtain one from XILINX?
@elliottmlandon No, Why do you want Testbench from Xilinx? This is just instantiation template.
You have to write your own testbench, Are you facing any problem while doing this?