Vitis create two binary files that I pass in program (script) and by passing binary_containter1.xclbin it programs FPGA with Vector_ADD functionality, and after passing binary_containter2.xclbin it reconfigures FPGA with Vector_MUL.
1. Is this statement true? (bypass resources limit on FPGA by reprogramming in on the run with single Vitis project)
2. Does FPGA is fully reconfigured or it's just an partial reconfiguration region that is changed?
3. How can I increase binary container limit, because I can only add one container (changing number of devices doesn't do anything) the binary container icon is grayed out even after changing "Number of devices" option. Do I need to enable something extra in Vivado to enable more binary containers? Should I enable partial reconfiguration and create reconfiguration region with Vitis enabled ports or is it automatic? Should I include FPGA manager in petalinux for this system or it is unecessary?
4. What more Compute Units do? If I have multiprocessor system more same functions could be executed in hardware in the same time via different processes?