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urjitmodhia
Observer
Observer
1,231 Views
Registered: ‎09-19-2018

SDSOC platform creation

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Good Afternoon;

I am trying to test my platform in SDSoC using src files available on xilinx website. I have used Vivado, SDK and SDSoC all with 2018.2 version. I have successfully created all the required files and a custom platform using SDSoC 2018.2. but while testing my platform using source files with version 2017.2 (as 2018.2 is not available) I have been encountered with following errors:

================================================================================================================================================

INFO: [VPL 60-1032] Extracting DSA to F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/vivado/.local/dsa
INFO: [VPL 60-251] Hardware accelerator integration...

WARNING: [VPL 60-1142] Unabled to read data from 'F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/vivado/output/generated_reports.log', generated reports will not be copied.

===>The following messages were generated while creating FPGA bitstream. Log file:F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/vivado/vivado.log :
ERROR: [VPL 17-69] Command failed: Invalid constraints filename specified

===>The following messages were generated while creating FPGA bitstream. Log file:F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/vivado/vivado.log :
ERROR: [VPL 17-69] Command failed: Invalid constraints filename specified
ERROR: [VPL 60-773] In 'F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/vivado\vivado.log', caught Tcl error: ERROR: [Common 17-69] Command failed: Invalid constraints filename specified
ERROR: [VPL 60-773] In 'F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/vivado\vivado.log', caught Tcl error: ERROR: [Common 17-69] Command failed: Invalid constraints filename specified
ERROR: [VPL 60-704] Integration error, problem rebuilding project prj
ERROR: [VPL 60-806] Failed to finish platform linker
ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling 'C:/Xilinx/SDx/2018.2/bin/vpl --iprepo F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/iprepo/repo --iprepo C:/Xilinx/SDx/2018.2/data/ip/xilinx --platform F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/pynqHDMI/export/pynqHDMI/pynqHDMI.xpfm --temp_dir F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0 --output_dir F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/vpl --input_file F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/p0/.xsd/top.bd.tcl --target hw --save_temps --kernels none --webtalk_flag SDSoC --remote_ip_cache F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/ip_cache --xp \"param:compiler.deleteDefaultReportConfigs=false\" '
sds++ log file saved as F:/urjit/Custom_OL_Urjit/pynqHDMI_2018.2/SDx/toto/Release/_sds/reports/sds.log
ERROR: [SdsCompiler 83-5004] Build failed

make: *** [toto.elf] Error 1

===================================================================================

for the easy understanding, you can see the log file attached below

please help me if someone have the solution

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urjitmodhia
Observer
Observer
1,098 Views
Registered: ‎09-19-2018

hi @nutang 

Thank you for your reply, but as per my knowledge Xilinx has not yet released the source files with 2018.x so I had tried to changed the constraint file in Vivado as the problem was not with the source files, it was with the constraint file and luckily the issue is solved.

View solution in original post

3 Replies
nutang
Moderator
Moderator
1,106 Views
Registered: ‎08-20-2018

Hi @urjitmodhia 

If I understood it correctly, you are using 2018.2 files on SDSoC 2017.2

It is recommended to use same version.

Best Regards,
Nutan
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urjitmodhia
Observer
Observer
1,099 Views
Registered: ‎09-19-2018

hi @nutang 

Thank you for your reply, but as per my knowledge Xilinx has not yet released the source files with 2018.x so I had tried to changed the constraint file in Vivado as the problem was not with the source files, it was with the constraint file and luckily the issue is solved.

View solution in original post

deep_yhy
Newbie
Newbie
543 Views
Registered: ‎07-25-2018

hi@ urjitmodhia

I have the same problem as you, even the content of log.

Can you tell me how you specifically modified constraint file to solve this problem?

Thank you very much and look forward to your reply~

 

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