I ran my program on HW and tried to view the application timeline with vitis analyzer.
Everything else could be viewed using the vitis analyzer but I fail to view the application timeline.
I was in fact able to view it when I used only on CU, but after increased the number of CUs to two, I can't.
To explain this situation in more detail, first of all, at the end of the program execution, a warning as below is shown.
"[XRT] WARNING: Incomplete CU profile trace detected. Timeline trace will have approximate CU End"
When I click on Application Timeline in the vitis analyzer, an info message as below is shown.
/tmp/vitis_analyzer_root5183964658629721226/-601958394/timeline_trace.wcfg is missing.
I assume the CU profile trace is incomplete because the FIFO queue is full. I am already using coarse profiling for data transfer and increased the FIFO queue to 128K, which is the maximum for FIFO. I also turned on the continuous_trace option.
I have the below added during v++ linking process.
-l --profile_kernel data:all:all:all
My xrt.ini file is as follows
I am using vitis 2020.1 and vitis_analyzer 2020.1.
Does anyone know why this kind of error is happening? I also want to know if there is a way to resolve this situation, such as a way to create a .wcfg file.