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Visitor siavashr
Visitor
642 Views
Registered: ‎07-10-2018

Direct data path from host memory to On-chip global memory

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Hello,

I have a question to better understanding SDAccel data flow from host to the FPGA board.

I know that as a default SDAccel passes data from the host to the Off-chip memory (board DDR).

However, I want to know that using SDAccel, is it possible to directly pass the data to the BRAMs (On-chip memories)?

I know that we can define on-chip global memories between kernels to pipeline them. But, what I'm looking for is defining on-chip global memories between the host memory (host DDR) and the FPGA without deploying off-chip DDR (on-board DDR).

 

Thanks

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Visitor siavashr
Visitor
758 Views
Registered: ‎07-10-2018

Re: Direct data path from host memory to On-chip global memory

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I figured it out.

It is not possible to directly transfer data to the on-chip memory. On-chip memory is only visible by the kernels and host has no access to them.

View solution in original post

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Visitor siavashr
Visitor
759 Views
Registered: ‎07-10-2018

Re: Direct data path from host memory to On-chip global memory

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I figured it out.

It is not possible to directly transfer data to the on-chip memory. On-chip memory is only visible by the kernels and host has no access to them.

View solution in original post

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Explorer
Explorer
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Registered: ‎05-23-2017

Re: Direct data path from host memory to On-chip global memory

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Which version of SDAccel are you using ?

 

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