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Scholar beandigital
Scholar
9,927 Views
Registered: ‎04-27-2010

Error when using debugging a design with an ILA and VIO

I have an Artix design in Vivado 2014.2. It has an ILA and VIO cores that I created using the IP catalog and instantiated in the design. When I program the board I get the following error. Can someone tell me what this means?

 

Thanks 

 

WARNING: [Labtools 27-147] vcse_server: No CseXsdb register file specified for CseXsdb slave type: 0, cse driver version: 0. Slave initialization skipped.
ERROR: [Labtools 27-147] vcse_server: Data structures not initialized for CseXsdb slave Device:0, user chain number/bus:1, slave index:0.
ERROR: [Labtools 27-1829] vcse_server failed during internal command 'CseXsdb_getRegisters'. See previous error messages.

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4 Replies
Xilinx Employee
Xilinx Employee
9,925 Views
Registered: ‎06-14-2012

Re: Error when using debugging a design with an ILA and VIO

Hi

Sometime back in 11.s, These are spurious messages that can be ignored. The errors occur when the device is reset with a PROG pulse or Power Cycle and then a reconnect is attempted.  

 

To work around this issue, reconfigure the device. Can you check if this still helps with Vivado?

 

Regards

Sikta

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Scholar beandigital
Scholar
9,921 Views
Registered: ‎04-27-2010

Re: Error when using debugging a design with an ILA and VIO

If I reprogram then it still doesnt work. Even worse the FPGA vanishes from the display. This only seems to have happened since I started using the VIO.

WARNING: [Labtools 27-147] vcse_server: No CseXsdb register file specified for CseXsdb slave type: 0, cse driver version: 17. Slave initialization skipped.
ERROR: [Labtools 27-147] vcse_server: Data structures not initialized for CseXsdb slave Device:0, user chain number/bus:1, slave index:0.
ERROR: [Labtools 27-1829] vcse_server failed during internal command 'CseXsdb_getRegisters'. See previous error messages.
set_property PROBES.FILE {C:/HDS/sata_lib/vivado/sata_phy_test/sata_phy_test.runs/impl_1/debug_nets.ltx} [lindex [get_hw_devices] 0]
set_property PROGRAM.FILE {C:/HDS/sata_lib/vivado/sata_phy_test/sata_phy_test.runs/impl_1/sata_phy_test.bit} [lindex [get_hw_devices] 0]
program_hw_devices [lindex [get_hw_devices] 0]
INFO: [Labtools 27-2154] Reading 3825883 bytes from file C:/HDS/sata_lib/vivado/sata_phy_test/sata_phy_test.runs/impl_1/sata_phy_test.bit...
INFO: [Labtools 27-32] Done pin status: HIGH
program_hw_devices: Time (s): cpu = 00:00:01 ; elapsed = 00:00:11 . Memory (MB): peak = 1909.504 ; gain = 0.000
refresh_hw_device [lindex [get_hw_devices] 0]
ERROR: [Labtools 27-147] vcse_server: Data structures not initialized for CseXsdb slave Device:0, user chain number/bus:1, slave index:0.
ERROR: [Labtools 27-1829] vcse_server failed during internal command 'CseXsdb_getRegisters'. See previous error messages.
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Scholar beandigital
Scholar
9,892 Views
Registered: ‎04-27-2010

Re: Error when using debugging a design with an ILA and VIO

Turns out that it was a clocking issue. I am driving the ILA and VIO from a GTP clock. The clocking was not quite correct so that was the issue.
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Moderator
Moderator
9,830 Views
Registered: ‎04-17-2011

Re: Error when using debugging a design with an ILA and VIO

Moving to Correct Board
Regards,
Debraj
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