How to store 2^18 samples with chipscope ??

[daldoul]

I using chipscope for real time data acquisition and I need to store 2^18 samples (1bit per sample) or more to do further processing with matlab. Chipscope is limited to 2^17 samples, So I developped a simple code to add a delay of 2^17 samples and than concatenate them to get 2^18 samples. 
I implement on ISE 13.3 version (running on Linux). The FPGA is an ML605,. At first, when Synthesizing (XST) I get an error : "FATAL_ERROR:Xst:cmain.c:221:1.28 - The XST process ran out of stack space. I solve it from this link : http://www.xilinx.com/support/answers/46350.html

And I Synthesize again but it never end, it seems blocked at :

=========================================================================
* Advanced HDL Synthesis *
=========================================================================

=========================================================================
Advanced HDL Synthesis Report
Macro Statistics
# Registers : 131074
Flip-Flops : 131074
=========================================================================
=========================================================================
* Low Level Synthesis *
=========================================================================
Optimizing unit <IBUFDS_Entity> ...
Optimizing unit <Buff_demi> ...

Can I use only chipscope to store more than 2^17 samples or I should try to correcte this Synthesize problem to get 2^18 samples ?

[bassman59]

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@daldoul wrote:

I using chipscope for real time data acquisition and I need to store 2^18 samples (1bit per sample) or more to do further processing with matlab. Chipscope is limited to 2^17 samples, So I developped a simple code to add a delay of 2^17 samples and than concatenate them to get 2^18 samples. 
I implement on ISE 13.3 version (running on Linux). The FPGA is an ML605,. At first, when Synthesizing (XST) I get an error : "FATAL_ERROR:Xst:cmain.c:221:1.28 - The XST process ran out of stack space. I solve it from this link : http://www.xilinx.com/support/answers/46350.html

And I Synthesize again but it never end, it seems blocked at :

Can I use only chipscope to store more than 2^17 samples or I should try to correcte this Synthesize problem to get 2^18 samples ?

---

FIRST AND FOREMOST: the ML605 is NOT an FPGA. It's a board, which happens to have an FPGA on it. Which FPGA? I don't know. Does that FPGA have enough BRAM to support what you're trying to do? I don't know -- RTFDS.

Now if the particular FPGA doesn't have enough BRAM for this, then the tools will try to build memory out of LUT RAMs, and that'll chew up resources and explode the synthesis time.

check on that.

[daldoul]

Thanks for your reply,
I have a Virtex-6 XC6VLX240T-1FFG1156 FPGA, How can I chek if the  FPGA have enough BRAM  for my storage  purpose ?
Can I pass without 'optimizing' because I only need to do aquisition ?

[debrajr]

The easiest way to do this is to remove the ILA/ICON instantiation from your RTL code. Further to that add a CDC file (Chipscope Definition File) from New Sources. Double click on that and make your connections. When you are doing that, you can see a BRAM count box which shows if it would be possible to implement that.