11-13-2018 09:41 AM
It was desired to use the PS-GTR IBERT feature to ensure physical operation of a custom board with no PHY, GTR's looped directly. An FSBL was generated with GEM0 set to SGMII on PS-GTR lane 0. In Vivado HW Manager the FSBL was loaded and IBERT started. PLL's showed lock but SGMII status was no link. After probing a few GEM0 registers it was determined a few other bits needed to be set to ensure link. The network_config register (0xFF0B0004) was written with 0x08280C00 to set the sgmii_mode_enable, pcs_select, and gigabit_mode_enable. Once these bits were set IBERT reported Link Up. I am posting this in case anyone else hits this issue.
11-19-2018 05:49 PM
Thank you for posting about this issue and the solution!
I'll go ahead and investigated it and possibly create an AR to further facilitate the finding of this resolution.
07-23-2019 02:34 AM - edited 07-23-2019 02:59 AM
The network config register would be populated by the macb driver (linux), or the uboot driver. This would not be populated in the FSBL. Only the GTR would be init in the FSBL.
If you want to use phyless then you can use the fixed link node in the devicetree. This will handle this for you. For example, you can update the GEM node in the system-user.dtsi with the fixed link node (similar to below):
You can see how this is handled in the zynq_gem.c driver in the u-boot:
Note: if you have the SGMII interface enabled, then this should be populated in the DT node in the pl.dtsi generated by the devicetree generator.
Also, for the fixed link, make sure that the CONFIG_PHY_FIXED define is added to your defconfig.