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Adventurer
Adventurer
3,407 Views
Registered: ‎12-24-2013

Vivado Tool Upgrade

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Hi All,

 

I am planing to upgrade my Vivado (2013.4) to Vivado (2017.3).

 

I am concern of my projects which are developed using Vivado (2013.4), is it required to update all the IPs to the latest versions.

 

Please give your suggestions which I have to be considered before upgrading the vivado..

 

Regards,

Prasanth V

 

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Adventurer
Adventurer
4,437 Views
Registered: ‎12-24-2013

Hi @syedz,

 

I was able to resolve the warning, as suggested it was a syntax error in my .XDC file.

 

Hi @balkris @drjohnsmith @dpaul24 @syedz

 

Thank you all for your suggestions.

 

Regards,

Prasanth

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Xilinx Employee
Xilinx Employee
3,398 Views
Registered: ‎08-01-2008

Vivado support auto migration guide. You require to open your project in latest tools . Run IP upgrade option in open project . It should work for you

 

Updating IP To update existing IP: 1. In the Sources window, click the IP Sources tab. 2. Right-click on an IP core source. 3. Select Upgrade IP from the popup menu.

 

 

Recustomizing IP To manually recustomize IP to match existing customization parameters: 1. In the Sources window, click the IP Sources tab. 2. Right-click on an IP core source. 3. Select Re-customize IP from the popup menu. Update the options in the dialog box as necessary.

 

Refer this document  as well

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_3/ug911-vivado-migration.pdf

 

check this Video 

https://www.youtube.com/watch?v=idfWyzDu9L0

https://www.xilinx.com/video/hardware/managing-vivado-ip-version-upgrades.html

 

 

 

Thanks and Regards
Balkrishan
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Moderator
Moderator
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Registered: ‎01-16-2013

@prasanthvthycaud,

 

Check this video: https://www.xilinx.com/video/hardware/managing-vivado-ip-version-upgrades.html

 

--Syed 

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Did you check our new quick reference timing closure guide (UG1292)?
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Scholar
Scholar
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Registered: ‎08-07-2014

Please give your suggestions which I have to be considered before upgrading the vivado.

 

Depends on the level of upgrade for that IP. Critical point would be if the IP has undergone changes in the interface signals (ports, generics - addition/removals).

Just upgrade, run Vivado and then if it complains, start by checking the interfaces of *each* upgraded IP.....I would do it this way!

------------FPGA enthusiast------------
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Teacher
Teacher
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Registered: ‎07-09-2009

One big note.

 

If your using a flex LM licence server,

 

then you will need to install a new server software,

   not just a new licence.

 

good luck, such a big job can be interesting, 

  Vivado has 'changed' over the years...

 

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Adventurer
Adventurer
3,327 Views
Registered: ‎12-24-2013

Hi @drjohnsmith@dpaul24@syedz@balkris

 

Thank you all for your suggestion and guidelines which have to be considered during upgrading of Vivado.

 

In order to get familiar with the latest tool I had downloaded Evaluation Version of Vivado 2017.3. As suggested, I had upgraded the IP Cores. When I compiled the design which was done on Vivado 2013.4 to the Vivado 2017.3, I am getting few critical warnings which were not present in Vivado 2013.4.

 

Critical warnings are on the .XDC file, I had defined few asynchronous clock groups which are outputs from MMCM (set_clock_groups -asynchronous -group [get_clocks clk_50m_mmcm_top]), is there any difference in defining asynchronous clock groups in Vivado 2017.3.

 

Regards,

Prasanth

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Moderator
Moderator
3,321 Views
Registered: ‎01-16-2013

@prasanthvthycaud,

 

Can you please share the complete Critical warning message along with the XDC command to verify?

Also check the following Link: https://forums.xilinx.com/t5/Vivado-Expert-Series-Blog/Constraining-Asynchronous-Clocks/ba-p/657880#comments

 

Also check  Topics "Asynchronous Clock Domain Crossings" and "Non-Recommended Asynchronous Clock Groups Constraints" at page 43 & 46.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_3/ug903-vivado-using-constraints.pdf

 

--Syed

 

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Adventurer
Adventurer
3,204 Views
Registered: ‎12-24-2013

@syedz

 

Thank you providing me the details of timing constraints.

 

Critical warning messages which I am getting are:

[Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group [get_clocks clk_50m_mmcm_top]' : 

set_clock_groups -asynchronous -group [get_clocks clk_50m_mmcm_top]

 

[Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group [get_clocks clk_125m_mmcm_top]' :

set_clock_groups -asynchronous -group [get_clocks clk_125m_mmcm_top]

 

Regards,

Prasanth

 

 

 

 

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Moderator
Moderator
3,194 Views
Registered: ‎01-16-2013

@prasanthvthycaud,

 

This seems to be a syntax error. Can you just run get_clocks command and see if it returns the correct value:

Open synthesized design and run the following TCL command in Vivado TCL console to see if the clocks exist in design:

1. get_clocks clk_50m_mmcm_top

2. get_clocks clk_125m_mmcm_top

 

--Syed

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Adventurer
Adventurer
4,438 Views
Registered: ‎12-24-2013

Hi @syedz,

 

I was able to resolve the warning, as suggested it was a syntax error in my .XDC file.

 

Hi @balkris @drjohnsmith @dpaul24 @syedz

 

Thank you all for your suggestions.

 

Regards,

Prasanth

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