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mike_east
Contributor
Contributor
2,046 Views
Registered: ‎09-23-2014

coregen fails with ICON 1.06a

Hi,

 

I can't generate ICON 1.06a IP with ISE 14.07 on Linux. However, ICON 1.05a generate fine, as does other IP's i've tried.

 

coregen.log shows:

 

Customize and GenerateINFO:sim:172 - Generating IP...
Applying current project options...
Finished applying current project options.
Customizing IP...
Release 14.7 - Xilinx CORE Generator IP GUI Launcher P.20131013 (lin64)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
Finished Customizing.
Generating IP...
Configuring files for chipscope_icon root...
WARNING:coreutil - Failed to generate file: chipscope_icon_xmdf_tcl
       invoked from within
   "deliverEJava [getComponentName] {}"
       (procedure "components::chipscope_icon::pre_generation" line 52)
       invoked from within
   "$PreGenerationTargets"
       (procedure "::xilinx::sim::generation::generatePsfCore" line 55)
       invoked from within
   "::xilinx::sim::generation::generatePsfCore {chipscope_icon_v1_06_a}
   {chipscope_icon} {ALL}"ERROR:sim - Failed to generate file: chipscope_icon_xmdf_tcl

ERROR:sim - Error found during generation.

 

 

I've tried the solution in AR# 33073 to no avail.

 

Any help most welcome!

 

Thanks,

Mike

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6 Replies
balkris
Xilinx Employee
Xilinx Employee
2,015 Views
Registered: ‎08-01-2008

These errors are caused by a long directory name.

To work around this, reduce the length of the directory path that the cores are being generated in.

For ChipScope inserter, this is the target directory for the output netlist.
Check this ARs as well
https://www.xilinx.com/support/answers/52787.html
Thanks and Regards
Balkrishan
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mike_east
Contributor
Contributor
2,003 Views
Registered: ‎09-23-2014

Thanks Balkrishan,

 

Does that limitation apply to Linux?

 

Either way, I tried to create ICON with a clean project in /tmp/x and get the same issue:

 

mike@bld:/tmp/x$ coregen -p .
Release 14.7 - Xilinx CORE Generator P.20131013 (lin64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
All runtime messages will be recorded in /tmp/x/coregen.log
Welcome to Xilinx CORE Generator.
Help system initialized.
The IP Catalog has been reloaded.
Opening project file /tmp/x/.
Customize and GenerateINFO:sim:172 - Generating IP...
Applying current project options...
Finished applying current project options.
Customizing IP...
Release 14.7 - Xilinx CORE Generator IP GUI Launcher P.20131013 (lin64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Finished Customizing.
Generating IP...
Configuring files for chipscope_icon root...
WARNING:coreutil - Failed to generate file: chipscope_icon_xmdf_tcl
invoked from within
"deliverEJava [getComponentName] {}"
(procedure "components::chipscope_icon::pre_generation" line 52)
invoked from within
"$PreGenerationTargets"
(procedure "::xilinx::sim::generation::generatePsfCore" line 55)
invoked from within
"::xilinx::sim::generation::generatePsfCore {chipscope_icon_v1_06_a}
{chipscope_icon} {ALL}"ERROR:sim - Failed to generate file: chipscope_icon_xmdf_tcl

ERROR:sim - Error found during generation.
Saved CGP file for project 'coregen'.
Closed project file.

Other suggestions?

 

Thanks,

Mike

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runyili
Newbie
Newbie
1,628 Views
Registered: ‎07-11-2018

Hi, I have met the same problem, Did you solve this problem?

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mike_east
Contributor
Contributor
1,618 Views
Registered: ‎09-23-2014

Unfortunately not.

 

If i recall correct i solved it by using an older version of ICON.

 

Balkris assertion that long filenames was the cause was incorrect, as shown in my reply above.

 

Regards,

Mike

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finish0404
Contributor
Contributor
1,436 Views
Registered: ‎05-14-2018

Hi : mike_east
How did you use older version of ICON or ILA?
Did you use older ISE version?
Or have the other way that can't change version of ISE?

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mike_east
Contributor
Contributor
1,431 Views
Registered: ‎09-23-2014

I used 14.7.

 

I think I enabled "show all versions" or something like that in coregen. Don't have it available now, so i cant check.

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