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Contributor
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Registered: ‎12-07-2015

isim HW co simulation and power estimation

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Hi,

let's consider that i have a flat design on a Virtex FPGA.

I want to execute ISIM HW co simulation in order to create the VCD file for power estimation.

I have three questions:

1) Is it possible?

2) The power estimation is it accurate?

3) It is possible to estimate the power by each CLB (separately) in my design?

Thank you.

 

 

 

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Scholar
Scholar
13,535 Views
Registered: ‎02-27-2008

yes,

 

The better the captured vcd file (length of time spent doing what you need) the better the estimate.  No need for co-simulation, per se.

 

Once the device is running, you know the actual power (for that part, voltage, and temperature).

 

Power per CLB is too small to measure, and is of no use I am aware of.  It is not like you are able to choose how each CLB is used (you would never finish the design in your lifetime if you had to manually configure each CLB for some supposed best use).

 

Power is best viewed in the large:  averaged over the entire device, over all variations.

 

Accuracy in power prediction/estimation is +/- 20 % typically.  It is also the prediction of the worst case, so actual power on one device is meaningless (tells you nothing about what the power in a production run might be).  Measuring the power over the range of temperatures and voltagers expected in a system on one unit is useful.  If you know the process corner of the device, it would tell you  great deal, but unfortunately we do not include that information in any individual part.  Comparing your measurements with the power analyzer and power estimator results will give you a hint at the process corner.

 

Based on all the predictions, estimates, and measurements made on a sample run of boards, one may safely conclude the power system is adequate.

 

Depending on the industry, there may be rules for over-capacity.  I recall in telecom the purchaser (phone company) might require proof the power supply was twice the capacity of the need (for central office 20 year life).

 

Other markets may have other requirements.  Commercial markets (like a large screen TV) may only provide for a 20% greater than worst case load (or no extra capacity at all depending on cost constraints).

 

Generally the power system is last to be considered, and has the least time and money put into it, and becomes the biggest source of field problems.  I always spent time insuring the power system was adequate, and met requirements.

 

Do not forget to test it at coldest temperature (soak until all at that temperature) and then startup, as well as hottest temperature (same soak) startup.

 

Remember that all load, ripple, noise, set point innacuracy must be within the recommended min and max Vcc voltages per the data sheet.  A poorly filtered supply could leave you no margin, and you may get timing errors as the voltage droops out of the specification.

Austin Lesea
Principal Engineer
Xilinx San Jose

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Highlighted
Scholar
Scholar
13,536 Views
Registered: ‎02-27-2008

yes,

 

The better the captured vcd file (length of time spent doing what you need) the better the estimate.  No need for co-simulation, per se.

 

Once the device is running, you know the actual power (for that part, voltage, and temperature).

 

Power per CLB is too small to measure, and is of no use I am aware of.  It is not like you are able to choose how each CLB is used (you would never finish the design in your lifetime if you had to manually configure each CLB for some supposed best use).

 

Power is best viewed in the large:  averaged over the entire device, over all variations.

 

Accuracy in power prediction/estimation is +/- 20 % typically.  It is also the prediction of the worst case, so actual power on one device is meaningless (tells you nothing about what the power in a production run might be).  Measuring the power over the range of temperatures and voltagers expected in a system on one unit is useful.  If you know the process corner of the device, it would tell you  great deal, but unfortunately we do not include that information in any individual part.  Comparing your measurements with the power analyzer and power estimator results will give you a hint at the process corner.

 

Based on all the predictions, estimates, and measurements made on a sample run of boards, one may safely conclude the power system is adequate.

 

Depending on the industry, there may be rules for over-capacity.  I recall in telecom the purchaser (phone company) might require proof the power supply was twice the capacity of the need (for central office 20 year life).

 

Other markets may have other requirements.  Commercial markets (like a large screen TV) may only provide for a 20% greater than worst case load (or no extra capacity at all depending on cost constraints).

 

Generally the power system is last to be considered, and has the least time and money put into it, and becomes the biggest source of field problems.  I always spent time insuring the power system was adequate, and met requirements.

 

Do not forget to test it at coldest temperature (soak until all at that temperature) and then startup, as well as hottest temperature (same soak) startup.

 

Remember that all load, ripple, noise, set point innacuracy must be within the recommended min and max Vcc voltages per the data sheet.  A poorly filtered supply could leave you no margin, and you may get timing errors as the voltage droops out of the specification.

Austin Lesea
Principal Engineer
Xilinx San Jose

View solution in original post

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Contributor
Contributor
6,995 Views
Registered: ‎12-07-2015

Thank you very much for the detail answer....

But please I need more information for my third question...

3) It is possible to estimate the power by each CLB (separately) in my design?

I need it for research purposes....

If  the power estimation per CLB is impossible probably is possible for a wider area (more CLBs).

Thnk you.

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Scholar
Scholar
6,989 Views
Registered: ‎02-27-2008

p,

 

OK, so for research, it is OK to ask any question.  That still does not make it practical, useful, or relevant.

 

I would ask what is it you are trying to show?  Why?  What purpose?  If it is just your personal interest to discover, and your advisor agreed to it, I cannot help you there (many things get studied that should not have ever been approved with degrees granted).

 

A PhD implies you are able to do original work, and contribute new (novel) solutions in a field.  A Masters implies you have working knowledge in a field and are able to contribute to a project at a level just below that of the PhD (although you should be able to see when a solution is novel, too).  A Bachelor degree implies you are able to practice in the field and contribute to the task at hand.  Prohects at each level have similar requirements.

 

Power in the FPGA is a well studied topic, with many papers at all levels.  To read all of them will take you awhile.  After you do, you might reconsider it as a topic.

 

If you do not wish to reveal all of this on the public forum, contact me at austin@xilinx.com.  As I am in the cube next to the XUP director, I often help out students (as students who use Xilinx parts may eventually become industry engineers who solve their problems with our parts).

 

Austin Lesea
Principal Engineer
Xilinx San Jose