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Observer
Observer
8,962 Views
Registered: ‎09-23-2015

vivado 2015.3 KU060-1517-e-2 jtag download fail

Hi!

 

  everyone! i used jtag download bit files to fpga. some bits file can work. some download fails. i don't know

why.

 

ERROR: [Labtools 27-3165] End of startup status: LOW
program_hw_devices: Time (s): cpu = 00:00:27 ; elapsed = 00:00:25 . Memory (MB): peak = 758.047 ; gain = 0.000
ERROR: [Common 17-39] 'program_hw_devices' failed due to earlier errors.

 i dump the register in the two situation。table.xlsx is failed.

 

 somebody help !

 

thanks!

 

 

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Xilinx Employee
Xilinx Employee
8,946 Views
Registered: ‎10-24-2013

Re: vivado 2015.3 KU060-1517-e-2 jtag download fail

Hi @nujnal,

 

Direct RSA bitstream configuration via JTAG is not supported in the 2015.3 version of Vivado Device Programmer. 

Please check the following answer record.

http://www.xilinx.com/support/answers/65328.html

Thanks,Vijay
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Xilinx Employee
Xilinx Employee
8,929 Views
Registered: ‎07-21-2014

Re: vivado 2015.3 KU060-1517-e-2 jtag download fail

Hi,

Are you using the same board to dump all bit files?
Can you please tell us what setting you are changing while generating two bit files i.e. failing and passing?
Please open implemented design for both passing and failing bitfile and run following command
report_property -all [current_design]
please share the output.

-Shreyas
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Xilinx Employee
Xilinx Employee
8,899 Views
Registered: ‎10-24-2013

Re: vivado 2015.3 KU060-1517-e-2 jtag download fail

Hi @nujnal

Did that help?

Thanks,Vijay
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Observer
Observer
8,892 Views
Registered: ‎09-23-2015

Re: vivado 2015.3 KU060-1517-e-2 jtag download fail

sorry, after we changed source code,new implemented bits file can work, so i had not fouse on the problem。

 

Are you using the same board to dump all bit files?

Yes,we dumped the two files in the same board.

 

Can you please tell us what setting you are changing while generating two bit files i.e. failing and passing?

we did not change any settings, but just changed verilog source code.

 

the project didn't saved. you konw after the bit file didn't not work, we changed source code implemented again,new bits can work.

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Xilinx Employee
Xilinx Employee
8,281 Views
Registered: ‎07-21-2014

Re: vivado 2015.3 KU060-1517-e-2 jtag download fail

Hi,

What block of source code you have changed? unsaved project/changed code seems to be creating issue. Do you still have any question about this?

-Shreyas
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