07-10-2018 08:47 AM
I'm using this example in github to make a very simple image filter, and I can synthesize and generate the IP, but I can't connect it in an AXI stream in Block Design. The INPUT_STREAM and OUTPUT_STREAM ports are both AXI output streams, it looks like. Just as a sanity check, I can't even connect the input directly to the output, since the ports are identical.
In all the examples I see, the AXI stream is defined as
typedef hls::stream<ap_axiu<32,1,1,1> > AXI_STREAM;
and the ports as
#pragma HLS INTERFACE axis depth=10000 port=INPUT_STREAM bundle=VIDEO_IN #pragma HLS INTERFACE axis depth=10000 port=OUTPUT_STREAM bundle=VIDEO_OUT
I can't find any information about the bundle=video_in any bundle definitions, where are these defined?
How can this ever work, if the input and output are defined as the same <ap_axiu> type?
07-11-2018 04:09 AM
If HLS is building the INPUT_STREAM as an output port, then it's got something wrong. Is your code exactly the same as the Github one? I've never seen HLS make that sort of mistake before.