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Explorer
Explorer
1,831 Views
Registered: ‎05-21-2017

HLS 2017.2: Linux drivers for my exported IP?

Hello,

 

I have designed an HLS IP with I/O identical to the HLS IP of XAPP1170.

 

I want to use the Vivado block design of the XAPP1170 with my HLS IP.

 

How can I use the Linux drivers, generated in HLS when I exported my IP, to control my IP in PetaLinux?

Is there a documented example of designing an HLS IP and then using it in PetaLinux?

 

 

Cheers,

Panos

 

 

Without proper software tools the hardware is unusable no matter how good and well designed it is.
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3 Replies
Explorer
Explorer
1,793 Views
Registered: ‎07-06-2016

Re: HLS 2017.2: Linux drivers for my exported IP?

Hi,

 

No sure what you are after but when you export your hardware to SDK in the project explorer inside your exported hardware project  you have a folder called drivers, you can find there the linux driver automatically generated by HLS to use under linux. They normally are called similar to this: x"your project name"_linux.c.

 

Hope it helps.

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Explorer
Explorer
1,783 Views
Registered: ‎05-21-2017

Re: HLS 2017.2: Linux drivers for my exported IP?

 

Thanks about the info, but I'm aware of this.

 

I don't think that this will work out of the box. E.g. when I generate the PetaLinux distro will I have to enable some modules in the kernel for DMA support? Or any other modules?

 

For instance, these guys do it this way:

https://fpgaw0rld.wordpress.com/2017/06/13/integrating-an-hls-accelerator-into-petalinux/

 

Is there an official way?

 

Do I need to do anything related to DMA, in order to use it, or it just works out of the box for me?

http://www.wiki.xilinx.com/DMA+Drivers+-+Soft+IPs

 

Does HLS generate info about the way I move the data between the ARM core and the PL to force PetaLinux to take the required actions? Or the HLS Linux drivers are just for simple AXI-Lite PS-PL communication and the user must take care the data movement driver support in PetaLinux?

 

 

Cheers,

Panos

Without proper software tools the hardware is unusable no matter how good and well designed it is.
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Visitor daubin1
Visitor
1,501 Views
Registered: ‎04-11-2018

Re: HLS 2017.2: Linux drivers for my exported IP?

HLS will create both bare metal and Linux drivers (really Linux UIO device driver access wrappers) for you.  You can find them in HLS or when you create your own FSBL in the SDK under system_top_hw_platform_0/drivers/<your new IP Core>/src. 

 

Example:

xblah_hw.h

xblah_linux.c

xblah_sint.c (Note, this is for stand alone drivers)

xblah.c

xblah.h

 

Then you edit your devicetree and add an entry for uio under the FPGA section, note you obtain the

memory address from your Block Design in Vivado in the Address Editor listing, in my case it was 0x83c00000:

Example:

blah_0: blah@83c00000 {

  compatible = "dmem-uio";  //depending on your kernel, this name may be different

  reg = <0x83c00000 0x10000>;

};

 

Then all you need to do is use the driver wrapper code Xilinx made for you.

Initialize the device struct, call setter routines, while loop until it is ready and get the result.

 

This guy does an excellent how to video for bare metal, all that's different is the driver call (sint vs Linux):

https://www.youtube.com/watch?v=aDaJIRoTlzQ

 

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