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Observer jirhus
Observer
9,761 Views
Registered: ‎06-19-2013

How to map shift register in BRAM

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Hello,

I use ap_shift_reg<> data type for implementing shift register. This data type is mapped into SRL (LUTs) but I want to map it into BRAMs. How is it possible?

Thanks.

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Observer jirhus
Observer
14,757 Views
Registered: ‎06-19-2013

Re: How to map shift register in BRAM

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I solved my problem. I make own class with array, than map array into BRAM resource. And than I use 

#pragma HLS DEPENDENCE variable=bufferBRAM array inter false

Because I want Read and write value in 1 clock. Than it works!

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6 Replies
Moderator
Moderator
9,747 Views
Registered: ‎04-17-2011

Re: How to map shift register in BRAM

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ap_shift_reg is meant for implementation in SRL's.
For other implementations, write you own Shift Register logic. Example below and map the resource to BRAM
template<class T, int N>
class my_shift_reg {
public:
T data[N];

public:

T read(int i)
{
return data[i];
}

T shift(T x)
{
T res=data[N-1];
for(int i=N-1; i>0; i--)
data[i]=data[i-1];
data[0]=x;
return res;
}
};
Regards,
Debraj
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Moderator
Moderator
9,682 Views
Registered: ‎04-17-2011

Re: How to map shift register in BRAM

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@jirhus Were you able to complete the Shift Register requirement? If the information was helpful, please close this thread by marking the post which helped as an Accepted Solution for other community members.

Regards,
Debraj
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Observer jirhus
Observer
9,638 Views
Registered: ‎06-19-2013

Re: How to map shift register in BRAM

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Sorry for my late reply.

I have tried this own shift register, but it doesn't work fine for me. C Simulation is OK, but when I pipelining the solution it shows the warning:

@I [SCHED-61] Pipelining function 'sobel'.
@W [SCHED-69] Unable to schedule 'load' operation ('buffer_data_V_0_load_2', Sobel_Filter/sobel.h:36->Sobel_Filter/sobel.cpp:34) on array 'buffer_data_V_0' due to limited memory ports.

 There is my shift register:

template<int N>
class my_shift_reg {
public:
	ap_uint<10> data[N];

public:
	ap_uint<10> shift(ap_uint<10> x){
	#pragma HLS INLINE
		ap_uint<10> res = data[N-1];
		for(int i=N-1; i>0; i--){
		#pragma HLS UNROLL
			data[i] = data[i-1];
		}
		data[0] = x;
		return res;
	}
};

 and declaration of array of buffers:

static my_shift_reg<FRAME_WIDTH-MASK_WIDTH> buffer[MASK_WIDTH-1];
#pragma HLS ARRAY_PARTITION variable=buffer complete dim=1
#pragma HLS RESOURCE variable=buffer core=RAM_2P_BRAM

 I think, the problem is, when I want to shitf the line and read last value and insert first in 1 clock period. Is it physicaly possible with BRAM? With LUTs it is working, but there is many requested resources of LUTs..

Thanks for your reply. JH

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Observer gorker
Observer
9,633 Views
Registered: ‎07-17-2014

Re: How to map shift register in BRAM

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well your hls resource pragrma may override array_partition pragma because complete resolves into registers according to ug902
in addition you may not synthesize bram srls with array_partitioning set to complete
if possible, i would like to know as well :)
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Observer jirhus
Observer
9,595 Views
Registered: ‎06-19-2013

Re: How to map shift register in BRAM

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I have tried some combination with and without array_partition pragma, but I don't solve my problem. I don't know which pragma shall I use. Because only with resource pragma the synthesis ends with :

@I [SCHED-11] Starting scheduling ...
@I [SCHED-61] Pipelining function 'sobel'.
@W [SCHED-69] Unable to schedule 'load' operation ('buffer_data_V_load_1', Sobel_Filter/sobel.h:35->Sobel_Filter/sobel.cpp:34) on array 'buffer_data_V' due to limited memory ports.

 

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Observer jirhus
Observer
14,758 Views
Registered: ‎06-19-2013

Re: How to map shift register in BRAM

Jump to solution

I solved my problem. I make own class with array, than map array into BRAM resource. And than I use 

#pragma HLS DEPENDENCE variable=bufferBRAM array inter false

Because I want Read and write value in 1 clock. Than it works!

0 Kudos