09-26-2018 05:54 AM
The picture is my code,the src_data and dst_data are two arrays.The src_data is input array,and it need to cache.The dst_data is just a relay array,so it need not to cache.I find src_data and dst_data are synthesized using BRAM,but the dst_data should not consume BRAM.I do not know why this is,so I want to know how to solve the problem.Thanks.
09-26-2018 06:04 AM
Try adding a "DATAFLOW" pragma inside the loop, moving the dst_data definition inside the loop, and applying a "STREAM" pragma to that. This still might not be enough (HLS may not be able to do dataflow on that loop) but it'll certainly help.
10-18-2018 11:49 AM
Hls synthesis arrays to ap_memory (bram) by default. What dou you mean the ddr shouldn't consume the BRAM? The local array should be stored using some memory resources. You can use the RESOURCE progma to choose where it's put.