I'm using Vivado 2020.2. I have custom IP with custom bus interfaces. Everything packages properly.
This post. https://forums.xilinx.com/t5/Design-Entry/How-to-inherit-AXI-Slave-signal-widths-from-Master-with-IP/m-p/1167803#M25215 suggest that the bd.tcl file should be placed in the Utility XIT/TTCL file group for custom ip.
I see no indication that any of the TCL hooks in bd.tcl are called when the design is validated. Even when there is a deliberate syntax error included.
Do I have bd.tcl in the correct location for 2020.2?
This post https://forums.xilinx.com/t5/Design-Entry/Propagate-the-update-of-bd-tcl-from-a-IP-design-package-to-the/td-p/854459 also mentions that the bd.tcl procs end up in a namespace named after the IP, I cannot see any such namespace after recursively listing them (using TCL info) from the root.
Any insights or methods to debug greatly appreciated.