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Visitor
Visitor
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Registered: ‎07-26-2018

How to keep module hierarchy in a DCP during write_checkpoint

We are trying to get module hierarchy from DCP, but realize that the DCP actually has been flattened.  We are not using explicit flatten_hierarchy commands that we know of.  Do you know how to keep the module hierarchy when generating a DCP so that the DCP can be later analyzed and the module hierarchy recovered?

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Xilinx Employee
Xilinx Employee
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Registered: ‎05-22-2018

Re: How to keep module hierarchy in a DCP during write_checkpoint

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Xilinx Employee
Xilinx Employee
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Registered: ‎05-14-2008

Re: How to keep module hierarchy in a DCP during write_checkpoint

If you used the -flatten_hierarchy default option "rebuilt", your RTL design is first flattened to do some optimization and then rebuilt the hierarchy during Synthesis.

You might see some hierarchies not matching your RTL. This is because some hierarchies might not be able to rebuilt perfectly as the RTL due to the cross boundary optimization. However, most hierarchies should match the RTL.

If you'd like to keep the exact hierarchies in the RTL, use -flatten_hierarchy = none.

-vivian

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