Use Tcl command to get modules' instance name

[cartercheng1]

Hi, I want to use Tcl command to get modules' instance name.

For example, if I have the following code section,  and I l know I have 3 different HDL modules (count arith and op), then I want to know if any Tcl command can tell me that the corresponding instance module-name for count is inst_count and for arith is inst_arith etc. Thanks a lot

    count inst_count (

        .rst       (count_rst),

        .clk       (clock),

        .count_out (RRs_count_outa)

    );

    //RR1 black box, Vivado DRS work-flow required

    arith inst_arith (

        .clk       (clock),

        .data      (RRs_count_outa),

        .result    (RRs_count_outb)

    );

    //RR1 black box, Vivado DRS work-flow required

    op inst_op (

        .clk       (clock),

        .dataa     (RRs_count_outa),

        .datab     (RRs_count_outb),

        .result    (RRs_count_outc)

    );

[rshekhaw]

Hi @cartercheng1 ,

Check the below post, might fulfil your requirement:

https://forums.xilinx.com/t5/Vivado-TCL-Community/Get-list-of-files-in-hierarchy-using-TCL/td-p/656343 

Thanks,

Raj

[hemangd]

Hi @cartercheng1, 

Try with get_cells -regexp 

And check get_cells -help to apply correct filters with it.

[avrumw]

The other way is easy - if you have an instance, you can find out what module it is an instance of. Each instance (which is an object of type "cell") has a property called "REF_NAME", which is the name of the "reference" - the name of the module/entity/primitive cell of which it is an instance

So if you do

get_property REF_NAME [get_cells inst_count]

it will return "count".

To do it the other way around is a little more complicated; you will need a filter command - something like

get_cells -hier -filter {REF_NAME == "count"}

This should return of list of cells that are instances of the module "count".

Be aware that all of this will only work if you do not flatten the hierarchy during synthesis - if the hierarchy is flattened, there are no more instances/modules, all primitive cells are at the top level of the hierarchy. So you need to turn off flatten_hierarchy in synthesis. This can be done via the Settings dialog box in the GUI or

set_property STEPS.SYNTH_DESIGN.ARGS.FLATTEN_HIERARCHY none [get_runs synth_1]

Avrum