06-02-2017 08:38 AM
I wanted to code and program a 16-bit RISC processor with multicycle datapath on an FPGA. What will be the good tool to do this, Vivado HLS or ISE ?
Also, I would like to know if there is enough logic area present on Virtix 6/7 series FPGA's to code a 32-bit simple RISC processor with multicycle datapath.
06-02-2017 08:56 AM
There are plenty of RISC designs out there to choose from (they all fit, of course).
MicroBlaze is the Xilinx one we fully support (32 bit). If you want something to play with, there is LEON, or the new RISC V from UC Berkeley,
06-02-2017 09:40 AM
You should have a look at these projects before coding - or take as a base
I can antecipate that your biggest concern should be creating code with the compiler, ie it would be necessary to provide a toolchain for it.
I can also say out of experience is that such small CPUs you would have to extract the hell out of it so verilog/VHDL would give you much more control perhaps. Code it up using your favorite environment, use any simulation tool like the Xilinx's own or even iverilog on Linux, then create an IP and wrap it into an AXI interface so you can integrate.
I can tell you the simplest 16/32 bit CPU with a functional toolchain is perhaps the ZPU (http://opencores.org/project,zpu). It brags 442 LUT @ 95 MHz after P&R w/32 bit datapath Xilinx XC3S400.
Xilinx's Microblaze takes 92 LUTs and 111 FF on a Virtex 7 (https://www.xilinx.com/products/intellectual-property/microblazecore/microblazecore-resource-utilizaton.html#virtex7) with minimal settings. If you ask me, I think this is pretty much the limit and given the intrinsic support of all tools (Vivado/SDK/SDSOC/SDxel) it is pretty **bleep** hard to beat.
Overall, if your goal is to introduce custom logic into your processing, as you said you perhaps do not need a CPU at all - just code it in HLS. A CPU only makes sense with a custom toolchain or any other form to automatically generate the instruction bitstream.
On this note, a very interesting path is the one taken by ExCamera with the J1 Forth (http://excamera.com/sphinx/fpga-j1.html). It is a very interesting project since the forth instructions it uses are both very intelligible to humans and have a 1:1 relationship with its assembly instructions so the "compiler" is a mere token mapping.
Hope this helps.
06-02-2017 10:33 PM
good morning to all,
I am using microblaze for my design, could anyone help me how to use trigonometric functions sin, cos , atan.... in microblaze code, when i am using sin of a variable i am getting error during bitstream generation of .bmm file error, out of memory, when i am using atan function behavior is unambiguous
thanks, waiting for quick response
06-02-2017 11:26 PM
@srinibas.behera you should really create a new message at top level, not reply to someone's question with another question - for your own sake, visibility
That said, I would check your link script to see where you are storing the .text section of your code and how much space you have allocated to it.