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Participant mageo17
Participant
3,432 Views
Registered: ‎04-28-2017

DSP48E1 slices

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Hi,

 

I had a questions concerning the DSP slices within an FPGA board. I am working with the Picozed 7030, which has 400 slices right. So my first question is to use those slices you have to specifically assign them otherwise they would remain unused? And to continue on this if they are unused can those slices be instead used as programmable logic cells or are they just taking up space and making routing more complicated.


Is there such a thing where the compiler has the intelligence to bring to use the DSP blocks when needed? If so how is this possible without any assignments or any specifications of the functionality of the slice (ALUMODE, OPMODE ...)?

 

Thank you in advance for clarifying this for me.


Best Regards,

Marc-Andre

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Historian
Historian
6,240 Views
Registered: ‎01-23-2009

Re: DSP48E1 slices

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And to continue on this if they are unused can those slices be instead used as programmable logic cells or are they just taking up space and making routing more complicated.

 

This is true. If the DSP48 cells aren't being used then they cannot be "re-purposed" as logic slices.

 

However, this,

 

So my first question is to use those slices you have to specifically assign them otherwise they would remain unused?

 

and the corollary

 

Is there such a thing where the compiler has the intelligence to bring to use the DSP blocks when needed? If so how is this possible without any assignments or any specifications of the functionality of the slice (ALUMODE, OPMODE ...)?

 

are not true.

 

Just like we don't (normally) instantiate LUT6 cells, we also don't normally (or at least always) directly instantiate DSP48E1 cells. The tools have the ability to map RTL functionality to these cells.

 

The simplest example of this is if you do "c <= a * b" (where a and b are not really small or constants) the tools will map this to a DSP48 slice - it will automatically configure ALUMODE and OPMODE to do the operation properly.

 

Even more complex structures like

always @(posedge clk)
begin
    m1_d1 <= m1;
    m2_d1 <= m2;
    //Insert multiply-accumulate code here
    macc <= (newval ? 48'b0 : macc) + m1_d1 * m2_d1;
end

will end up entirely in the DSP48 cell, with the "newval" influencing OPMODE (to select the clearing or feedback of the product) the m1_d1 and m2_d1 ending up in the AREG and BREG registers, and the macc ending up in the PREG.

 

It can do wider multipliers using the cascade paths and other things...

 

Even things that don't use multiplication can be mapped into the DSP48. For example, you can use the adder in the DSP48 using typical inference (c <= a + b) and setting the "use_dsp48" attribute (see UG912) to force it into the DSP48. I think you can even force it to map multiplexers (i.e. 48 bit 2:1 MUX) or simple pipeline registers using this attribute (but I haven't tried).

 

In addition, the DSP48 can be instantiated through a variety of IP modules - the multiplier wizard (simple and complex), the FIR filter, ...

 

So there are a variety of ways of using the DSP48 cell without directly instantiating it.

 

Avrum

 

Tags (1)
4 Replies
Historian
Historian
6,241 Views
Registered: ‎01-23-2009

Re: DSP48E1 slices

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And to continue on this if they are unused can those slices be instead used as programmable logic cells or are they just taking up space and making routing more complicated.

 

This is true. If the DSP48 cells aren't being used then they cannot be "re-purposed" as logic slices.

 

However, this,

 

So my first question is to use those slices you have to specifically assign them otherwise they would remain unused?

 

and the corollary

 

Is there such a thing where the compiler has the intelligence to bring to use the DSP blocks when needed? If so how is this possible without any assignments or any specifications of the functionality of the slice (ALUMODE, OPMODE ...)?

 

are not true.

 

Just like we don't (normally) instantiate LUT6 cells, we also don't normally (or at least always) directly instantiate DSP48E1 cells. The tools have the ability to map RTL functionality to these cells.

 

The simplest example of this is if you do "c <= a * b" (where a and b are not really small or constants) the tools will map this to a DSP48 slice - it will automatically configure ALUMODE and OPMODE to do the operation properly.

 

Even more complex structures like

always @(posedge clk)
begin
    m1_d1 <= m1;
    m2_d1 <= m2;
    //Insert multiply-accumulate code here
    macc <= (newval ? 48'b0 : macc) + m1_d1 * m2_d1;
end

will end up entirely in the DSP48 cell, with the "newval" influencing OPMODE (to select the clearing or feedback of the product) the m1_d1 and m2_d1 ending up in the AREG and BREG registers, and the macc ending up in the PREG.

 

It can do wider multipliers using the cascade paths and other things...

 

Even things that don't use multiplication can be mapped into the DSP48. For example, you can use the adder in the DSP48 using typical inference (c <= a + b) and setting the "use_dsp48" attribute (see UG912) to force it into the DSP48. I think you can even force it to map multiplexers (i.e. 48 bit 2:1 MUX) or simple pipeline registers using this attribute (but I haven't tried).

 

In addition, the DSP48 can be instantiated through a variety of IP modules - the multiplier wizard (simple and complex), the FIR filter, ...

 

So there are a variety of ways of using the DSP48 cell without directly instantiating it.

 

Avrum

 

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Participant mageo17
Participant
3,367 Views
Registered: ‎04-28-2017

Re: DSP48E1 slices

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Hi Avrumw,

 

Thank you very much for your answer, definitely clears things up for me.

 

Just wanted to confirm what I learned after looking through UG912 and XST user guide. So for the snippet of code that you posted you would have to set the attribute use_dsp48 = yes, and then your arithmetic's would be computed using a DSP slice. Do you always have to force the DSP slice with the use_dsp48, is that what you mean by not having to directly instantiate it?

 

Looked at other posts on the same topic, after you introduced me to use_dsp48, copied the links below.

https://forums.xilinx.com/t5/7-Series-FPGAs/How-to-define-quot-use-dsp48-quot-yes-quot-quot-for-v7-series/td-p/439754

 

https://forums.xilinx.com/t5/Synthesis/How-can-make-a-counter-go-into-DSP48/td-p/386257

 

Thank you,

Mageo17

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Historian
Historian
3,363 Views
Registered: ‎01-23-2009

Re: DSP48E1 slices

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Do you always have to force the DSP slice with the use_dsp48, is that what you mean by not having to directly instantiate it?

 

No - stuff based around multiplication will be naturally mapped to the DSP48 without the use of the use_dsp48 = yes. In fact, you would use use_dsp48 = no if you wanted to force it out of the DSP48. Furthermore, when an operation is forced into the DSP48 (whether by the tool's choice or by the use_dsp48 attribute), the tools will look for any other adjacent resources that can be mapped into the other resources in the DSP48 - for example, the output register of the operation will attempt to be mapped to the PREG and any registers before will attempt to be mapped to the AREG/BREG.

 

Avrum

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Participant mageo17
Participant
3,359 Views
Registered: ‎04-28-2017

Re: DSP48E1 slices

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Thank you Avrumw, going to try it all out!
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