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Visitor enslaved46
Visitor
5,459 Views
Registered: ‎07-14-2016

Dealy getting data from ROM

I was trying to read the data from ROM. Works perfectly fine except first 100 nano seconds . Data is not loaded from the from. There is a delay. Here is my code and the test bench.  In main source oClock is just a dangling wire don't mind it.simulation.PNGadder.PNGpc counter.PNGtestbench.PNG

main.PNGHhhh

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4 Replies
Visitor enslaved46
Visitor
5,458 Views
Registered: ‎07-14-2016

Re: Dealy getting data from ROM

I forgot to mention in above text that I created a single port ROM using IPCATALOG. Thank you in advance,

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Xilinx Employee
Xilinx Employee
5,430 Views
Registered: ‎08-01-2008

Re: Dealy getting data from ROM

This is expected behavior. First 100 ns are the initial delay it calculated by cclk frequency to model hardware behavior . You can assert reset for few clock cycles
Thanks and Regards
Balkrishan
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Xilinx Employee
Xilinx Employee
5,429 Views
Registered: ‎09-20-2012

Re: Dealy getting data from ROM

Hi @enslaved46

 

GSR will be active during first 100ns hence you should not issue any read command before 100ns. Hope this clarifies.

Thanks,
Deepika.
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Visitor enslaved46
Visitor
5,366 Views
Registered: ‎07-14-2016

Re: Dealy getting data from ROM

Thanks Deepika!

  i though of delalaing two cycles using D-Flipflop but then realied I will still have first 4 byte data. I tried reset onption mention by Balkrishan it did not work. Could you please give me some sample code I could get inspired with.

Thank you

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