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Observer
Observer
2,583 Views
Registered: ‎12-21-2016

FFT design

Hi, my greetings to all. 

 

Here i want to show you my design and i want to ask about something as well. My design is shown simply by block diagram in the pic below. 

 

My question is about connecting the FIFO memory with the FFT core. I used the FIFO after the ADC so i can keep the sampled data before offering it to the FFT later. I used the AXI4Stream for the FIFO so i can make use of its ports to control my FFT.

 

So can i connect the Handshake signal (m_axis_Valid and m_axis_Ready) of the FIFO directly with the FFT core's signals (S_axis_Valid and S_axis_Ready) and the data ports as well or not . 

 

May you please comment on that whether this way is correct or not. And if there's a better way to connect these 2 cores may you help me, i would really appreciate that too much.

 

Regards

 

Muhamet 

 

Block diagram.png
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Explorer
Explorer
2,546 Views
Registered: ‎10-14-2015

Hi @arabi_muhamet,

 

Please refer the below discussion on below 

 

https://forums.xilinx.com/t5/DSP-and-Video/FFT-8-0-Design-Example/m-p/338079/highlight/true#M13874

 

Thanks,

Sarada

 

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