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Visitor maheen_189
Visitor
4,580 Views
Registered: ‎07-18-2016

Impedance Matching on HR Bank LVCMOS33

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HI,

I am Using Artix-7 XC7A200T-1FBG 484C. some of my signals are further connected to a coaxial line contact( like the ones on SMA connector).

Generally anything connected to coaxial contact requires Impedance Matching. Now in current case I want to connect the coaxial  line with the  FPGA I/O on HR bank, LVCMOS33 (3.3V ). First please confirm that the output impedance on these IOs is 50ohms as I have deduced after reading (ug471)?

http://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf 

and 

http://www.xilinx.com/support/documentation/user_guides/ug483_7Series_PCB.pdf

 

Also Please confirm what is default "Ro" (driver output impedance)?

How can I perform impedance matching if the load (coaxial line) connected to IO of FPGA has an impedance of 75 ohms or 90 ohms?

Waiting for you response.

Thank you.

 

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Community Manager
Community Manager
8,631 Views
Registered: ‎07-23-2015

Re: Impedance Matching on HR Bank LVCMOS33

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@maheen_189 The output impedance for LVCMOS33 depends on the drive strength. 

 

Please check the below threads that discuss the same

 

https://forums.xilinx.com/t5/7-Series-FPGAs/Kintex-7-Output-Drive-Strength-definition/td-p/412321

 

https://forums.xilinx.com/t5/7-Series-FPGAs/Output-impedance-of-HP-bank-IO-signals/td-p/550919

- Giri
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4 Replies
Community Manager
Community Manager
8,632 Views
Registered: ‎07-23-2015

Re: Impedance Matching on HR Bank LVCMOS33

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@maheen_189 The output impedance for LVCMOS33 depends on the drive strength. 

 

Please check the below threads that discuss the same

 

https://forums.xilinx.com/t5/7-Series-FPGAs/Kintex-7-Output-Drive-Strength-definition/td-p/412321

 

https://forums.xilinx.com/t5/7-Series-FPGAs/Output-impedance-of-HP-bank-IO-signals/td-p/550919

- Giri
--------------------------------------------------------------------------------------------------------------------
There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered.
Keep conversing, give Kudos and Accept Solution when you get one.
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Visitor maheen_189
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4,532 Views
Registered: ‎07-18-2016

Re: Impedance Matching on HR Bank LVCMOS33

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Thank you for your prompt response. The information is useful but Can you guide me what is the default drive strength (in mA) if we are using LVCMOS 3.3V (HR bank), as you are saying the output impedance depends on drive strength and as far as I have studied it can be adjusted in UCF. But I am not specifying anything in UCF file. So, my question is what is the default drive strength (current) at I/O. Thank you.
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Community Manager
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Registered: ‎07-23-2015

Re: Impedance Matching on HR Bank LVCMOS33

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@maheen_189 Default drive strength value is 12. 

 

You will find the information in UG471 http://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf

 

ug471_drive strength.JPG

- Giri
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Visitor maheen_189
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Registered: ‎07-18-2016

Re: Impedance Matching on HR Bank LVCMOS33

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Thank you for sharing. 

Now as the link you forwarded earlier says the default best impedance match for 6mA or 8mA is 50ohms. 

Is there a best known match for 12mA? Is it 25 ohms? (Ro 25 ohms is mentioned in UG483).

Or do we have to go into signal integrity to find board impedance for 12mA or more?

As I read in UG471 , page 184 (http://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf )

 that for current greater than 8mA we have Far VTT 50 ohm. But I cannot understand which termination topology is suitable for me after looking at figure A-1.

And by default terminations (written in figure A-1) you mean that it is already present in FPGA I/O? and I don't need to added it in my PCB design?

Also All this impedance matching needs to be done at all signal frequencies or just on high frequencies?

Thank you.

 

 

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