12-17-2013 01:56 AM
how can I include two sub modules in the simulink xilinx black box? In the matlab configuration file I'm using the command "this_block.addFile('... .v')". My two submodules are ahead of the topmodule and all verilog files are in the same directory.
I can also generate the verilog code out of the simulink model with the system generator. So I can use the verilog code from my simulink model in the ISE Project Navigator. There is no problem with the correctness of the verilog modules.
But my problem is, that I can not run my simulink model after the including of the topmodule with the two submodules.
I'm using Matlab r2012b, Simulink Version 8.0 and ISE Project Navigator 14.5.
12-17-2013 02:02 AM
Please refer below UG chapter -4 , this is the general flow to bring .v/.vhd files in to sysgen as a block box and simulate in system generator.
If you have followed this and still face issues please share us the error log or your hurdle so as to have more clues.
12-17-2013 02:42 AM
There is no problem to create the black box. The .m file shows you how I include the .v files. (Line 127 to 129). The verilog file "xl_select_controller_koordmux.v" is my topmodule.
The error message "Bool type output port op gets indeterminate value" is reported by another block. This block runs correct, when the black box (with two submodules) isn't included. The outputs of the black box are connected to "assert" blocks. So the types of the output are also correct.
So when I include the black box in my simulink model, then its impossible to run the simulation of the model. So maybe there is something wrong with the config.m file?
12-17-2013 02:56 AM
A bit old but can you check this link http://www.xilinx.com/support/answers/36919.html
If it does not help please attach you mdl for invetisgation.
12-17-2013 03:11 AM
there is another common source why black boxes refuse to work.
In the black box properties the simulation tool is disabled by default.
So without a simulator no outputs will be generated.
Set it to ISIM at least, or configure it to use ModelSim if you have it.
Have a nice simulation
12-17-2013 11:50 PM
thank you very much for your help. I used in the properties of the black box the simulation mode: ISE Simulator. I also used cast blocks to convert the output types. But there is no change in the error message.
Are there any rules for the name of the verilog module? Sometime Matlab has problems, when the name of the model is wrong (or when there are numbers in the name).
01-02-2014 09:41 PM
10-30-2014 04:30 AM
Thank you very much!
finally some helpful advise. And I dont mean the people copypasting AR contents but I'm talking about e_stoimenov that got the right hint for me, thank you.
PS: this problem happened to me with ISE 14.7 and matlab 2013b