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logison
Observer
Observer
6,112 Views
Registered: ‎03-05-2013

Minimum supply wires for JTAG testing

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Hi,

In fact, this threade is strongly relatetd with another one:

http://forums.xilinx.com/t5/New-Users-Forum/JTAG-configuration-problem/td-p/339509

FPGA is simply not visible for JTAG (Initialize JTAG chain).

The problem is not solved still. I've got some other idea how to test the problem and thats why I've decided to open this new threade.

Because iMPACT can't see my FPGA (XC6SLX45-CSG324), I suspect the following problems:

1) Device is demaged (I don't think so).
2) Some connection(s) is/are broken or shorted on my PCB (rather not)
3) Device is not properly assembled on PCB (here I suspect a problem !!)

In order to test the reason of my problem, I want to remove FPGA from my custom PCB and make some basic wire connections FPGA JTAG <=> PCB. Not such an insane job like this:

http://zremcom.ru/images/stories/Stat/interes/2011/kulibin/rebol.jpg

Just only JTAG connections + Power Supplies. And here is my basic question:

Can I make for just ONLY this testing purposes make a SINGLE WIRE SUPPLY for VCCINT,VCCAUX,VCCO_2,GND into one relevant FPGA pins only? Additionaly SUSPEND and HSWAPEN pins => GND? What other signals should I consider for just only JTAG communication problems?

Please take a look on the attached sch.

Best Regards,

Mariusz

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logison
Observer
Observer
7,699 Views
Registered: ‎03-05-2013

Hi Austin,

 

Finally the problem is solved. Below is the explanation:

 

1) After the installation of ISE 14.6, iMPACT was asking me for some updates.

2) I've ignored it, cause SW was still working (in fact not!!).

3) Finally iMPACT has crashed completely.

4) Desperately I've used a VERY OLD version of ISE (7.1i) which I still have on my HDD. And everything works fine!! I've installed the newest version of ISE (14.6) again and everything is OK.

 

Anyway, thanks a lot to you and everybody who was trying to help in this threade. A lot of this threade informations could be usefull to other XLNX users.

 

Thanks again, Regards,

 

Mariusz

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9 Replies
austin
Scholar
Scholar
6,097 Views
Registered: ‎02-27-2008

l,

 

The FPGA needs proper Vccint, Vccaux, and Vcco for the config bank only.

 

No other pins matter except....I believe PROG_b should be allowed to float high (it has a weak internal pullup.

 

Check the state of the HSWAP_EN pin that it is enabling all pins with weak pullups prior to configuration.

 

JTAG has priority, so regardless the state of the mode pins, JTAG will operate.

 

Have you looked at the signal integrity of the TCLK, TDI, TDO signals?  Have you verified the power supplies are  correct?

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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logison
Observer
Observer
6,091 Views
Registered: ‎03-05-2013

Hi Austin,

 

1) Regarding JTAG signals integrity, I've payed a special attention on it. It must be OK. Max. distance between the JTAG connector to the last device (2 devices FPGA+PROM) in chain is not more then 1.5".

2) HSWAPEN is tied to GND, if FPGA is well installed on PCB.

3) Can I supply FPGA (Vccint,Vccaux,Vcco_2 and GND) using just a one wire for each? Just for testing the JTAG communication. If I solder FPGA to my PCB using 4 wires for supply and 4 wires for JTAG and iMPACT will finally see the FPGA, then I will know that my problem was wrong assembling or misconnection(s) on PCB (rather not). OK, can I use just only 4 pins for Vccint,Vccaux,Vcco_2 and GND with use of external wires?

 

Best Regards,

 

Mariusz

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bassman59
Historian
Historian
6,088 Views
Registered: ‎02-25-2008

@logison wrote:

Hi Austin,

 

1) Regarding JTAG signals integrity, I've payed a special attention on it. It must be OK. Max. distance between the JTAG connector to the last device (2 devices FPGA+PROM) in chain is not more then 1.5".

2) HSWAPEN is tied to GND, if FPGA is well installed on PCB.

3) Can I supply FPGA (Vccint,Vccaux,Vcco_2 and GND) using just a one wire for each? Just for testing the JTAG communication. If I solder FPGA to my PCB using 4 wires for supply and 4 wires for JTAG and iMPACT will finally see the FPGA, then I will know that my problem was wrong assembling or misconnection(s) on PCB (rather not). OK, can I use just only 4 pins for Vccint,Vccaux,Vcco_2 and GND with use of external wires?

 

Best Regards,

 

Mariusz


show us a schematic of your FPGA's power-supply connection.

----------------------------Yes, I do this for a living.
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austin
Scholar
Scholar
6,085 Views
Registered: ‎02-27-2008

Using one wire for power and ground will make a connection:  yes.


But, the signal integrity is likely to be very bad (ringing, overshoot, undershoot).

 

The more power and ground wires you have, the bett the signal integiry.

 

1.5" doesn't mean anything:  it is all about the impedance of the path.  From the cable to the connections, connevctions to the FPGA.  Observe the signals with an oscilloscope, and post the pictures back here.  Pay attention tot he clock rising edge:  it should be monotonic, no overshoot.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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logison
Observer
Observer
6,081 Views
Registered: ‎03-05-2013

Hi,

 

Schematics is in the attachment of my first post.

 

Regards,

 

Mariusz

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logison
Observer
Observer
6,080 Views
Registered: ‎03-05-2013

Hi Austin,

 

I've been observing TCK on scope. Looks fine. Take a look at schematics, TCK has been terminated with 68Ohm and 100pF in series. Anyway, PROM which is last in chain is always detected by iMPACT while FPGA (first in chain) never.

I do expect the problem to be in wrong BGA assembling. I'll make the tests with FPGA out of PCB tomorrow and I'll let you know about the results.

 

Best Regards,

 

Mariusz

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bassman59
Historian
Historian
6,074 Views
Registered: ‎02-25-2008

@logison wrote:

Hi,

 

Schematics is in the attachment of my first post.

 

Regards,

 

Mariusz


Sorry, didn't see the link.

 

Question: why the AC termination on the JTAG TCK line? Remember that TCK doesn't run continuously, and the first few clocks may not be recognized properly because the cap hasn't charged. Look at TCK on the 'scope right as the JTAG process starts.

 

The power-supply connections on the board look fine to me.

----------------------------Yes, I do this for a living.
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logison
Observer
Observer
6,071 Views
Registered: ‎03-05-2013

Hi,

 

Regarding the AC termination I've found such a recommendation here:

 

http://www.xjtag.com/support-jtag/dft-guidelines.php

 

Anyway, PROM is always detected, FPGA never.

 

Best Regards,

 

Mariusz

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logison
Observer
Observer
7,700 Views
Registered: ‎03-05-2013

Hi Austin,

 

Finally the problem is solved. Below is the explanation:

 

1) After the installation of ISE 14.6, iMPACT was asking me for some updates.

2) I've ignored it, cause SW was still working (in fact not!!).

3) Finally iMPACT has crashed completely.

4) Desperately I've used a VERY OLD version of ISE (7.1i) which I still have on my HDD. And everything works fine!! I've installed the newest version of ISE (14.6) again and everything is OK.

 

Anyway, thanks a lot to you and everybody who was trying to help in this threade. A lot of this threade informations could be usefull to other XLNX users.

 

Thanks again, Regards,

 

Mariusz

View solution in original post

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