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Observer
Posts: 26
Registered: ‎09-01-2017

Overflow in 16_bit adder - VHDL

Hi,

 

I have designed a 16-bit adder, the waveform by the decimal values prove that I have overflows, but I cannot figure out how to solve this problem. I have uploaded the files "here" and the wave form is as enclosed.

 

add.jpg

 

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Teacher
Posts: 5,141
Registered: ‎03-31-2012

Re: Overflow in 16_bit adder - VHDL

@sara_yzdn you need to extend the input numbers to 17 bits (either zero extend for unsigned values or sign extend for signed values) and then add.

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