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Explorer
Explorer
1,961 Views
Registered: ‎08-13-2010

faulty CLB detection

I am new in FPGA faul tolerance domain. I have search many of papers on google where they ar trying to detect faulty clb. They are saying about some VPR(versatile place and route) tool. I dnt have any VPR tool, is there any tools in ISE suit  to detect faulty CLB 

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Scholar
Scholar
1,951 Views
Registered: ‎02-27-2008

Re: faulty CLB detection

No,

 

They go bad so infrequently, that no one would waste their time doing what you suggest (except Xilinx, who has test patterns to do just that).

 

The failure rate for our devices (all causes) are listed in ug116.pdf.


When these numbers are ~ 10-20 failures per billion hours from all causes, it makes absolutely no sense to waste time looking for one specific fault (among millions ofg possible faults).


Go do something far more useful, OK?

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose