cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
hulk789
Explorer
Explorer
4,601 Views
Registered: ‎07-13-2015

junction temperature excedded

Jump to solution

How to rectify such errors

snapshot32.png
0 Kudos
Reply
1 Solution

Accepted Solutions
austin
Scholar
Scholar
8,160 Views
Registered: ‎02-27-2008

1.  Reduce your clock rate for core, IO, etc. as much as possible

2.  Optimize your design (remove anything you do not absolutely require)

3.  Operate with a better heatsink (more airflow, lower ambient temperature)

4.  Use an Industrial temperature range device (100C max) instead of a commercial grade device (85C max)

5.  Split the design into two smaller devices

 

Use the power estimator spreadsheet to evaluate your choices quickly.

 

Note that accuracy in estimates is +/-20%.  After place and route, thge estimate is more accurate when reported by the tools.  If you do not have the design placed and routed, do so, and see by how much the power varies from this estimate (note confidence is 'low' implying it has not finished optimizing the design).


Optimizing the design for area may improve power as well -- check what strategies you have chosen.

 

Austin Lesea
Principal Engineer
Xilinx San Jose

View solution in original post

3 Replies
austin
Scholar
Scholar
8,161 Views
Registered: ‎02-27-2008

1.  Reduce your clock rate for core, IO, etc. as much as possible

2.  Optimize your design (remove anything you do not absolutely require)

3.  Operate with a better heatsink (more airflow, lower ambient temperature)

4.  Use an Industrial temperature range device (100C max) instead of a commercial grade device (85C max)

5.  Split the design into two smaller devices

 

Use the power estimator spreadsheet to evaluate your choices quickly.

 

Note that accuracy in estimates is +/-20%.  After place and route, thge estimate is more accurate when reported by the tools.  If you do not have the design placed and routed, do so, and see by how much the power varies from this estimate (note confidence is 'low' implying it has not finished optimizing the design).


Optimizing the design for area may improve power as well -- check what strategies you have chosen.

 

Austin Lesea
Principal Engineer
Xilinx San Jose

View solution in original post

drjohnsmith
Teacher
Teacher
4,578 Views
Registered: ‎07-09-2009

oouch, thats a fair amount of power,

 

gated clocks , so as Austin says your only clocking the parts you want when you want,

  

and a damed big heat sink,  with some air floww , 1.1 deg c per watt is not that good a design,

 

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
muzaffer
Teacher
Teacher
4,498 Views
Registered: ‎03-31-2012
infer more dsp48s and distributed memory or block ram even for small sized memories. clock gating as suggested and optimize your placement so wide busses don't travel far.
- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.