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How to Drive Multiple Live Cameras and Displays for Pennies—A Free IEEE Spectrum webinar

Xilinx Employee
Xilinx Employee
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You might think of MIPI as an interface strictly for mobile applications, and it’s certainly true that mobile device manufacturers were the first to be drawn to the low cost, low power, and high performance of the MIPI D-PHY interface. However, the affinity of mobile device OEMs for the MIPI D-PHY interface as an I/O standard for component-level video cameras and displays resulted in huge manufacturing volumes for a wide range of such imaging devices, now available at shockingly low prices as a consequence of the high volumes, which now attracts system OEMs in every market that uses video cameras and displays.

 

In its active, high-speed transfer mode, the MIPI D-PHY standard employs differential signaling that’s not natively compliant with the I/O ports on Xilinx 7 series (Virtex, Kintex, Artix, and Zynq) and Spartan-6 programmable-logic devices. However, you can now build validated, compliant MIPI D-PHY transmitter and receiver ports with the 1.8V ports on these Xilinx FPGAs and All Programmable SoCs using just a few low-cost resistors—6 resistors per transmitter port and 3 resistors per receiver port.

 

MIPI D-PHY compatibility for just pennies.

 

Here’s a diagram:

 

 

 Low-Cost MIPI D-PHY Implementation for FPGAs.jpg

 

 

The resulting interfaces support 600-800Mbps operation.

 

Xilinx worked with its Alliance Premiere members Northwest Logic and Xylon to develop a demo of this low-cost MIPI D-PHY interfacing scheme. Northwest Logic provided the MIPI CSI-2 camera controller and DSI display controller IP cores and Xylon did the system integration using its own 2D and 3D LogicBRICKS graphics cores to create the demo, which is based on a Xilinx ZC706 Zynq SoC Evaluation Kit. Here’s a block diagram of the demo system:

 

 

 MIPI D-PHY for FPGA Demo System.jpg

 

 

Here’s a short, video of the MIPI D-PHY demo system in action, proving the feasibility of this approach to incorporating the low-cost MIPI D-PHY interface in programmable-logic designs:

 

 

 

With the low cost of this resistor-only MIPI D-PHY design, you can easily afford to design multiple camera and display ports into your system.

 

Xilinx, Northwest Logic, and Xylon recently discussed these topics in a live IEEE Webinar and you can watch the free archived version of this IEEE Spectrum Webinar, “How to Drive Multiple Live Cameras and Displays for Pennies,” by clicking here.

 

Note: I had some issues with the automatic slide advancement in this archived version of the Webinar. If that happens to you, download the PDF of the slides and follow along with those.

 

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