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Xilinx UltraScale+ PCIe Gen3 x16 hardened IP passes PCI SIG compliance test: See it now on video running at 100Gbps+

Xilinx Employee
Xilinx Employee
0 0 45.2K

 

As of today, you can now watch a short, 2.5-minute video showing the Xilinx UltraScale+ PCIe Gen3 x16 integrated block for PCI Express in action, working quite successfully with an Intel Skylake processor. 4. The hardened, integrated Xilinx UltraScale+ PCIe Gen3 x16 interface passed PCI SIG compliance testing this month and it’s the industry’s first Gen3 x16 PCIe solution built into a programmable device.

 

The video below shows the PCIe Gen3 interface operating at 12.65Gbytes/sec (100Gbps+) over real hardware. You’ll find this hardened, integrated PCIe Gen3 interface core in Virtex UltraScale+, Kintex UltraScale+, and Zynq UltraScale+ MPSoC family members. Xilinx Vivado HLx tools already support this advanced feature.

 

Here’s the video:

 

 

 

 

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