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Adam Taylor’s MicroZed Chronicles, Part 103: SDSoC and the Xilinx XADC

by Xilinx Employee ‎10-05-2015 09:21 AM - edited ‎01-06-2016 11:30 AM (12,687 Views)

 

By Adam Taylor

 

My plan last week, was to look at how we could add another operating system to the Xilinx SDSoC Design Environment. However, having spent a few hours last week at work getting a Zedboard talking to a Digilent PmodAD2—a small, 4-channel, 12-bit A/D converter board with an I2C interface based on an Analog Devices AD7991—I realized that I could include what I learned within a larger example. So over the next few blogs, we are going to look at using SDSoC to develop signal-processing applications where we capture and process a signal and then use SDSoC to gain performance improvements.

 

 

Digilent PmodAD2 ADC Board.jpg

 

Digilent PmodAD2, a small, 4-channel, 12-bit A/D converter board

 

 

To do this we will use a variety of different signal-capturing methods using the Zynq SoC’s integrated XADC analog module and the above mentioned PModAD2 board, amongst other approaches.

 

 

Zynq XADC Block Diagram.jpg

 

 

 

The hardware definition for the MicroZed platform within SDSoC provides access to the XADC via the DevC interface as seen in the picture above. This method provides a lower-bandwidth method of interfacing with the XADC than connecting to it over the AXI bus. It also requires no PL configuration to access and use it.

 

We will need to define a new hardware platform to communicate over the AXI bus, which we will address shortly. Indeed to communicate with the Pmod and other external ADCs, we will need to update the hardware definition, which will provide a good example of defining our own platform.

 

However there are applications where we are happy with a lower bandwidth, for example in system health monitoring or in some industrial measurement applications. Note that we can use the Zynq SoC’s XADC to monitor the device’s own supply voltages and operating temperature and we can take action should a parameter go out of range. Indeed we can even set alarms on these measurements within the XADC to issue an alarm if limits are exceeded.

 

Accessing the Zynq SoC’s XADC via SDSoC is very simple. Indeed it is like previous examples using SDK. We can use the same header file we did before—xadcps.h—which contains a number of functions we can use to configure and drive the XADC. I have uploaded to github the file I created to read the XADC using this method. The screen shot below shows the results of running it.

 

 

Image1.jpg

 

 

 

As we are going to be looking at ADC’s, it is probably a good point to recap sampling basics here. Based on Nyquist sampling criteria, if we wish to sample a signal we must sample at twice the highest frequency of interest within the signal. For example, a 10MHz signal should be sampled at 20Msamples/sec, at a minimum. Note that if we sample a signal at a higher frequency than our minimum Nyquist sampling rate, then the signal may alias back into the quantised spectrum. I say “may” because the signal has to be within the input bandwidth of the ADC. Using aliasing can be a very interesting and can allow direct signal sampling at higher frequencies if the ADC input bandwidth is sufficient.

 

 

 

Image2.jpg

 

 

Nyquist zones and Aliasing, showing the images in the 1, 3 and 4 zones for a signal in zone 2, the fundamental (Fa) and the images.

 

 

 

We can use the algorithm below to determine the frequency at which the harmonic component will be present:

 

 

Fharm=N ×Ffund

IF (Fharm=Odd Nyquist Zone)

       Floc=Fharm Mod Ffund

Else

     Floc=Ffund-(Fharm Mod Ffund)

End

 

 

 

Where N is the integer for the harmonic of interest. For example, with a 2500MHz sample rate of and a fundamental of 1807MHz, there will be a harmonic component at 693MHZ within the first Nyquist zone.

 

Over the next few blogs we will look more at ADC based applications starting with the XADC.

 

The files as always are on the github repository.

 

 

If you want E book or hardback versions of previous MicroZed chronicle blogs, you can get them below.

 

 

 

  • First Year E Book here
  • First Year Hardback here.

 

 

 MicroZed Chronicles hardcopy.jpg

 

 

  • Second Year E Book here
  • Second Year Hardback here

 

 

 MicroZed Chronicles Second Year.jpg

 

 

 

You also can find links to all the previous MicroZed Chronicles blogs on my own Web site, here.

 

 

 

 

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About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.