06-25-2019 04:33 PM
I come from a software background where you can build an application with "debug info" embedded in a debug version of a program. You can single step through it and examine the source code and read/write variables etc.
Does Vivado have an equivalent to this where you can build an application (HW) with debug logic built-into it and single-step the "time" where a "step" is one or one/half clock cycles so you can examine all memory cells and logic levels in the design etc?
06-29-2019 11:48 AM
You are describing Vivado Logic Analyzer, which basically probes the internal signals using an internal clock that you define.
There's also the VIO Core, which allows you to provide input as well.
To get started, take a look at this Tutorial:
06-29-2019 07:43 PM
There are a couple of different ways of debugging hardware, and knowing the trades of all of them is important;
All of these methods are more akin to running your code in a debugger than running within the ILA is. That's not to knock the ILA. On the contrary, each method has its purpose. The big advantage of simulation is that you can get access to every register within your design at every time step to help yourself debug. The problems with simulation are that it can take hours upon hours to do, create GB of information, and leave you wondering where within the trace the problem existed. Formal methods can often find bugs faster, with 10s of kB of trace instead of GB, and point you directly to the bug instead of forcing you to search for it, but ... they struggle to handle large designs.
My whole point is that you should be using these tools before you find yourself stuck in hardware.
Yes, you can use an internal logic analyzer to debug your design within hardware. Yes, there is a place for that. But just like any good carpenter will have several sizes of chisels, the internal logic analyzer has it's place.
An internal logic analyzer takes up logic within your chip. It requires resources. It can capture some, not all, of the traces within your design. How many? That depends upon how much logic you wish to allocate to this purpose. How long shall the traces be? Again, that depends upon how much logic you wish to dedicate to this task. There's a cost to doing this. In general, debugging in this fashion should be your last resort.
That said, if I find myself struggling with an interaction between my design and something off chip, I often find myself needing some form of internal logic analyzer. (I've actually never used Vivado's ILA. It's not all that hard to make something for yourself that fits the bill, although it may not have all the bells and whistles of the professional quality software.)
Hopefully this fills in some more details for you. Debugging hardware designs is much harder than it is in software, since you don't easily have insight into everything that's going on.
P.S. I deal with the topic of debugging designs extensively on zipcpu.com. Feel free to stop by for a visit.