GTX Transciever loopback using example design on KCU105 with FINISAR SFP module

[arpit.rathi]

Hi,

I am trying to use the example design of Ultrascale Transceiver wizard to perform a loopback (line rate = 1.25Gb/s) through a single SFP module (TX and RX pairs are shorted on the RJ-45 connector). The design runs fine on simulation but gives unexpected RX data in hardware. 

I have double checked the GTX transceiver pins, sys_clock source and GTREF_clock source and other clock constraints. There are no timing violations. I am not sure of the issue here. Could anyone provide any insights on this?

Regards,

Arpit 

[reshmaakhil]

Hi,

As a first step you try to test the transceiver using IBERT core. 

https://www.xilinx.com/products/intellectual-property/ibert_ultrascale_gth.html#documentation

If you couldn't find any issue in it we can confirm that there is no hardware related problems. Then we can go for next troubleshooting steps. 

Regards,

Reshma 

-------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

[thakurr]

Hi @arpit.rathi 

Do you have an update to this?