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5,453 Views
Registered: ‎03-23-2011

Problem with PROM in Xilinx Spartan 3e 1600

Hello,
       I am using  Spartan 3e 1600e FPGA board package fg320  from xilinx and PROM XCF04S,and using Xilinx ISE webpack 12.4 software,  I am using Master serial mode configuration and i have assigned all the jumpers  M0, M1, M2 correctly and using Platform USB cable.

My FPGA is programmed properly and generated bits file is verified successfully and its working perfectly according to requirements.

 when I tried to implement the same "mcs file"  on PROM, Its saying " Programm succeeded"  but the programmed is not getting installed on FPGA board even the LED on the board does not glow even after it got succeeded.
Help me out and can any one let me know what can be the problem or any one faced the same problem before??.

 

 

Given below is the console message.

 

GUI --- Auto connect to cable...
AutoDetecting cable. Please wait.
PROGRESS_START - Starting Operation.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
 Driver file xusb_emb.sys found.
 Driver version: src=1029, dest=1029.
 Driver windrvr6.sys version = 8.1.1.0. WinDriver v8.11 Jungo (c) 1997 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811.
 Cable PID = 0008.
 Max current requested during enumeration is 74 mA.
Type = 0x0004.
 Cable Type = 3, Revision = 0.
 Setting cable speed to 6 MHz.
Cable connection established.
Firmware version = 1029.
File version of C:/Xilinx/12.4/ISE_DS/ISE/data/xusb_xlp.hex = 1303.
Firmware hex file version = 1303.
Downloading C:/Xilinx/12.4/ISE_DS/ISE/data/xusb_xlp.hex.
Downloaded firmware version = 1303.
PLD file version = 0012h.
 PLD version = 0012h.
PROGRESS_END - End Operation.
Elapsed time =      0 sec.
Type = 0x0004.
 ESN device is not available for this cable.
INFO:iMPACT - Current time: Wed 23. Mar 11:24:46 2011
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 10000000.
Validating chain...
Boundary-scan chain validated successfully.
'2': Erasing device...
'2': Erasure completed successfully.
'2': Programming device...
done.
'2': Putting device in ISP mode...done.
'2': Putting device in ISP mode...done.
'2': Verifying device...done.
'2': Verification completed successfully.
'2': Calculated checksum matches expected checksum, 00001dd30
'2': Putting device in ISP mode...done.
'2': Putting device in ISP mode...done.
'2': Setting user-programmable bits...
done.
'2': Putting device in ISP mode...done.
'2': Starting FPGA Load with Prom Data...INFO:iMPACT:563 - '2':Please ensure proper connections as specified by the data book ...
'2': Programming completed successfully.
'2': Programming completed successfully.
PROGRESS_END - End Operation.
Elapsed time =     16 sec.
INFO:iMPACT - Current time: Wed 23. Mar 11:25:05 2011
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 10000000.
Validating chain...
Boundary-scan chain validated successfully.
'3': Erasing device...
'3': Erasure completed successfully.
'3': Programming device...
done.
'3': Putting device in ISP mode...done.
'3': Putting device in ISP mode...done.
'3': Verifying device...done.
'3': Verification completed successfully.
'3': Calculated checksum matches expected checksum, 00498ecc3
'3': Putting device in ISP mode...done.
'3': Putting device in ISP mode...done.
'3': Setting user-programmable bits...
done.
'3': Putting device in ISP mode...done.
'3': Starting FPGA Load with Prom Data...INFO:iMPACT:563 - '3':Please ensure proper connections as specified by the data book ...
'3': Programming completed successfully.
'3': Programming completed successfully.
PROGRESS_END - End Operation.
Elapsed time =     12 sec.

 

Can any one please let me know what could be the solution for this ???

 

 

waiting for the replies..

 

thanks in advance.

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5 Replies
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Voyager
Voyager
5,448 Views
Registered: ‎05-21-2008

Re: Problem with PROM in Xilinx Spartan 3e 1600

does that configuration solver help?
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Highlighted
5,436 Views
Registered: ‎03-23-2011

Re: Problem with PROM in Xilinx Spartan 3e 1600

No, I tried all the possible ways
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Highlighted
5,435 Views
Registered: ‎03-23-2011

Re: Problem with PROM in Xilinx Spartan 3e 1600

its seems to work fine few days before when i configured some of the programmes, but suddenly i dont know its not getting configured on the board.

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Visitor
Visitor
5,347 Views
Registered: ‎03-05-2009

Re: Problem with PROM in Xilinx Spartan 3e 1600

Hi,

 

Not sure if you've solved your problem yet but here are a few things that I would check.

 

1. Make sure that your design has the CCLK set as the input clock for startup

2. Try to check the Load FPGA option in impact when programming the prom

3. power cycle the board after programing the prom.

4. Check FPGA Done pin.

 

Regards,

Fayez

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Moderator
Moderator
5,330 Views
Registered: ‎08-10-2007

Re: Problem with PROM in Xilinx Spartan 3e 1600

Hi,

 

You could also select the FPGA in iMPACT and read back the status register (Debug > Read Device Status) to check whether any errors are flagged in the FPGA.

 

 

 

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