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Visitor arnelcollins
Visitor
743 Views
Registered: ‎12-05-2016

Using Vivado 2016.4 to Program New Zynq xc7z020 Board

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Hi All,

 

I recently bought a new Zynq xc7z020 board. My other board works quite well with my current design. With the new board however I am getting the following message when I try to program the PL directly using a bitfile and a .ltx file directly from the Program Manager in Vivado:

 

INFO: [Labtools 27-1434] Device xc7z020 (JTAG device index = 1) is programmed with a design that has no supported debug core(s) in it.

WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
WARNING: [Labtools 27-1974] Mismatch between the design programmed into the device xc7z020_1 and the probes file(s) C:/Users/Arnel/te0720_test_2016.4/validate/validate_97/validate_DIS.runs/impl_1/debug_nets.ltx.
The device design has 0 ILA core(s) and 0 VIO core(s). The probes file(s) have 1 ILA core(s) and 0 VIO core(s).
Resolution:
1. Reprogram device with the correct programming file and associated probes file(s) OR
2. Go to device properties and associate the correct probes file(s) with the programming file already programmed in the device.

 

Using get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub] gives a value of 1. I am not sure how to make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active or how to manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. Can anyone say how to implement these steps or point me to a manual that explains more fully?

 

Also, is it even worthwhile to carry out the above steps considering that my other board already works or should my new board be returned?

 

Thanks if someone could help with the above.

 

AC

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Moderator
Moderator
840 Views
Registered: ‎11-09-2015

Re: Using Vivado 2016.4 to Program New Zynq xc7z020 Board

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Hi @arnelcollins,

 

This message usually comes when the PS is not up so the ILAs (if you have any) are not up. The the remaining of the PL should be ok if you are not using the PS clocks.

 

Could you try to run any application with SDK (ex simple hello word) just to have the PS up and try again to program the PL following your previous flow?

 

Hope that helps,

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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3 Replies
Moderator
Moderator
841 Views
Registered: ‎11-09-2015

Re: Using Vivado 2016.4 to Program New Zynq xc7z020 Board

Jump to solution

Hi @arnelcollins,

 

This message usually comes when the PS is not up so the ILAs (if you have any) are not up. The the remaining of the PL should be ok if you are not using the PS clocks.

 

Could you try to run any application with SDK (ex simple hello word) just to have the PS up and try again to program the PL following your previous flow?

 

Hope that helps,

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

Visitor arnelcollins
Visitor
584 Views
Registered: ‎12-05-2016

Re: Using Vivado 2016.4 to Program New Zynq xc7z020 Board

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Hi Florent,

 

Thank you, this helps quite a lot. When I activate a program using SDK I can re-program the Zynq board using the Program Manager in Vivado.

 

The problem now is, if I switch off the board, then turn it back on again, I have to use SDK to get the process going again. Is there any way to eliminate this problem once and for all?

 

I believe this all started when I tried to incorrectly program flash memory on the fpga board. Deleting the Configuration Memory Device does not help. Is there another way to solve the problem?

 

Thank you.

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Moderator
Moderator
564 Views
Registered: ‎11-09-2015

Re: Using Vivado 2016.4 to Program New Zynq xc7z020 Board

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Hi @arnelcollins,

 

This is not a problem only how the zynq work.

 

Use a PL clock instead of a PS clock (clock from the zynq) might help.

 

Else you need to configure the zynq using tcl with the tcl file generate in the hw platform in SDK.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**