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Registered: ‎09-09-2019

Xilinx Zynq-7000 SoC ZC702 Evaluation Kit: FMC and PMOD connectors

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Following are questions about two different connectors on the Xilinx Zynq-7000 SoC ZC702 Evaluation Kit.

I would like to understand if there is the possibility of using some pins of a FMC connector as a single ended pin and a part of the same FMC connector (by appropriately choosing the pins) as differential signals. If so, I would like to understand how to specify which pins are used for single ended signals and which for differential signals. And if possible I would like to have available manuals or guides explaining all this.
I would also like to know where to find information on the dynamics of the pins dedicated to differential signals.

Another question concerns the PMOD connectors J62 and J63. I would like to understand how many of the pins of these two connectors are actually available to be connected to simple drives and / or used as input to process some signals.

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-06-2018

Re: Xilinx Zynq-7000 SoC ZC702 Evaluation Kit: FMC and PMOD connectors

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Hi pietrom@kth.se ,

I would like to understand if there is the possibility of using some pins of a FMC connector as a single ended pin and a part of the same FMC connector (by appropriately choosing the pins) as differential signals. If so, I would like to understand how to specify which pins are used for single ended signals and which for differential signals. And if possible I would like to have available manuals or guides explaining all this.
I would also like to know where to find information on the dynamics of the pins dedicated to differential signals.

---------- >> You can use FMC Pins as Single Ended Pins also and also you can use FMC Pins as Differential Pins also. Below Image helps you understand better, for more information refer page 54 of UG850 (v1.7).

                   Note : Ensure you will not give Single ended Clock Signals to N pin of the FMC Connector.

              FMC_ZC702.JPG

             >> From Table 1-28 ( page 54 of UG850 (v1.7)) and Table 1-29, you can ensure which signals you have declared as Single ended and Differential signals. You can refer page 72 for FMC Signal Related Constraints, which will be helpfull for you to delcare IO Standard for each pin of FMC.

             >> Also while declaring Differential IO standard for the FMC Pins, you need to ensure that based on the bank voltage you are providing to that corresponding bank of FMC, you need to ensure that IO standard will have same voltage level swing. For more information refer page 18 of UG471 (v1.10). And also refer Table 1-55 of UG471 (v1.10).

 

 

Another question concerns the PMOD connectors J62 and J63. I would like to understand how many of the pins of these two connectors are actually available to be connected to simple drives and / or used as input to process some signals.

------ >> J62 and J63 PMOD Headers can be used to drive the GPIO LEDS  on the board. J62 1-4 pins(i.e PMOD2_0 to PMOD2_3) can be used to drive LEDS.

        >> J63 has a second dual-purpose function. The even numbered pins are wired in parallel to the Arm PJTAG header J41 pins TDI, TIMS, TCK, and TDO. The J41 PJTAG signals are connected to SoC Bank 13 GPIO pins which simultaneously drive J41 and J63. When J41 is used for Arm PJTAG functionality, the J63 even numbered pin should not be used. When J63 even numbered pins are used as GPIO, connector J41 should not be use.

        >> For more information on J62 and J63 PMOD Headers refer page 49 and 50 of UG850 (v1.7). And to know which PMOD Headers Pins driver which LEDS refer page 46 of UG850 (v1.7).

 

Hope this helps.

 

Regards,

Deepak D N

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-06-2018

Re: Xilinx Zynq-7000 SoC ZC702 Evaluation Kit: FMC and PMOD connectors

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Hi pietrom@kth.se ,

I would like to understand if there is the possibility of using some pins of a FMC connector as a single ended pin and a part of the same FMC connector (by appropriately choosing the pins) as differential signals. If so, I would like to understand how to specify which pins are used for single ended signals and which for differential signals. And if possible I would like to have available manuals or guides explaining all this.
I would also like to know where to find information on the dynamics of the pins dedicated to differential signals.

---------- >> You can use FMC Pins as Single Ended Pins also and also you can use FMC Pins as Differential Pins also. Below Image helps you understand better, for more information refer page 54 of UG850 (v1.7).

                   Note : Ensure you will not give Single ended Clock Signals to N pin of the FMC Connector.

              FMC_ZC702.JPG

             >> From Table 1-28 ( page 54 of UG850 (v1.7)) and Table 1-29, you can ensure which signals you have declared as Single ended and Differential signals. You can refer page 72 for FMC Signal Related Constraints, which will be helpfull for you to delcare IO Standard for each pin of FMC.

             >> Also while declaring Differential IO standard for the FMC Pins, you need to ensure that based on the bank voltage you are providing to that corresponding bank of FMC, you need to ensure that IO standard will have same voltage level swing. For more information refer page 18 of UG471 (v1.10). And also refer Table 1-55 of UG471 (v1.10).

 

 

Another question concerns the PMOD connectors J62 and J63. I would like to understand how many of the pins of these two connectors are actually available to be connected to simple drives and / or used as input to process some signals.

------ >> J62 and J63 PMOD Headers can be used to drive the GPIO LEDS  on the board. J62 1-4 pins(i.e PMOD2_0 to PMOD2_3) can be used to drive LEDS.

        >> J63 has a second dual-purpose function. The even numbered pins are wired in parallel to the Arm PJTAG header J41 pins TDI, TIMS, TCK, and TDO. The J41 PJTAG signals are connected to SoC Bank 13 GPIO pins which simultaneously drive J41 and J63. When J41 is used for Arm PJTAG functionality, the J63 even numbered pin should not be used. When J63 even numbered pins are used as GPIO, connector J41 should not be use.

        >> For more information on J62 and J63 PMOD Headers refer page 49 and 50 of UG850 (v1.7). And to know which PMOD Headers Pins driver which LEDS refer page 46 of UG850 (v1.7).

 

Hope this helps.

 

Regards,

Deepak D N

---------------------------------------------------------------------------------------------------------------

Please Kudo and Accept as a Solution, If it helps.

---------------------------------------------------------------------------------------------------------------

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