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Observer gianmarcoborri
Observer
803 Views
Registered: ‎11-14-2017

ZC706 GTX SerDes

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Hello all, 

 

I have a ZC706 board (Zynq-7000 FPGA) and I'd like using Si5324 to generate a reference clock for a Quad 110 SerDes . 

 

[UG954 p. 40]

Quad 110:
° MGTREFCLK0 - FMC_HPC_GBTCLK1_M2C clock
° MGTREFCLK1 - SI5324_OUT_C_P/N jitter attenuator clock
° Contains 4 GTX transceivers allocated to FMC_HPC_DP[7:4]_C2M_P/N

 

In this block RXP/N and TXP/N pads are all connect to the FMC HPC and in my design I can'use other boards, so this SerDes Channel is not available...

...I forgot this and I constrained and connect RXP/N and TXP/N ports to ZC706 SMA, but it seems they belong to another SerDes Quad

 

Quad 111

° MGTREFCLK0 - FMC_LPC_GBTCLK0_M2C_C_P/N
° MGTREFCLK1 - SMA_MGT_REFCLK_P/N SMA GTX clock input
° Contains 1 GTX transceiver allocated to FMC_LPC_DP0_C2M_P/N
° Contains 1 GTX transceiver allocated to SMA_MGT_TX_P/N and RX_P/N SMA
connectors
° Contains 1 GTX transceiver allocated to SFP_TX and _RX_P/N SFP/SFP+ connector
° Contains 1 GTX transceiver

 

Surprisingly, my system works perfectly but it seems very strange. Is it possible that working SerDes belongs to Quad 111 instead Quad 110? I checked that in Quad111 there are no activated reference clocking sources. 

 

Anyone can help me to understand it?

 

Thanks in advice

 

Gianmarco Borri

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1 Solution

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Xilinx Employee
Xilinx Employee
765 Views
Registered: ‎06-02-2017

回复: ZC706 GTX SerDes

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Hi gianmarcoborri,

 

In the GTX structure, the Quad 111 can use the clock from Quad 110 as reference clock, but it need to make some settings in the design. The details can be found in the UG476,  Ch2 Reference Clock Selection and Distribution -->Reference Clock Selection and Distribution.

So you can double check if your design has selected the MGTREFCLK1 of Quad 111 as Quad110 ref clock.

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3 Replies
Xilinx Employee
Xilinx Employee
766 Views
Registered: ‎06-02-2017

回复: ZC706 GTX SerDes

Jump to solution

Hi gianmarcoborri,

 

In the GTX structure, the Quad 111 can use the clock from Quad 110 as reference clock, but it need to make some settings in the design. The details can be found in the UG476,  Ch2 Reference Clock Selection and Distribution -->Reference Clock Selection and Distribution.

So you can double check if your design has selected the MGTREFCLK1 of Quad 111 as Quad110 ref clock.

-------------------------------------------------------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
--------------------------------------------------------------------------------------------------------------------------------------------

View solution in original post

Observer gianmarcoborri
Observer
759 Views
Registered: ‎11-14-2017

ZC706 GTX SerDes

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Hi zhiq, 

thanks for this marvelous reply. You're right, I didn't read this in the GTX reference clock interconnection

 

Thanks again

 

Gianmarco Borri

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Participant nishantseth07
Participant
560 Views
Registered: ‎02-07-2017

Re: ZC706 GTX SerDes

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HI Gianmarco Borri

 

I want to transmit my serial data using SMA GTX of zc706 board. I have gone through the link to use GTX port "https://www.xilinx.com/support/documentation/boards_and_kits/zc706/2014_4/xtp243-zc706-ibert-c-2014-4.pdf" But i am not able to find a solution where should i change the code to send my custom data. 

You are using the same platform for GTX. Please help me if you have any idea to transmit new custom data using SMA GTX.

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