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ftauziac
Newbie
Newbie
2,567 Views
Registered: ‎06-06-2018

ZCU102 - Board User Interface software

Hi,

I try to use the ZCU102 - Board User Interface (BoardUI.exe) to get currents on all power rails.

I follow xtp433 tutorial, I updated board firmware successfully with the 5th July 2017 version.

However in "Power" tab, I can't read any power/voltage or current. It works for the "voltages" tab and "system monitor" tab and others.

I get this error when I try to get the power on PSINTFP for example :

 

Running sysc func: <interpINA226:0>
Error while running sysc function
Traceback (most recent call last):
  File "testthread.py", line 537, in sysc
  File "config.py", line 563, in interpINA226
ZeroDivisionError: float division by zero

This is the same error for all powers for PS side and PL side in tab "Use Default Calibration".

Thank you for your answer,

Best regards

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15 Replies
corydearing
Contributor
Contributor
2,459 Views
Registered: ‎05-07-2018

I have the same problem.  I am able to control clocks, read voltage, but unable to read power information and unable to read FMC HPC0 EEPROM Data.

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hj
Moderator
Moderator
2,439 Views
Registered: ‎06-05-2013

Hi,
Which version of System controller you are using? Can you try with any other SCUI version.

Try with 2017.4 Here is the link to download it.
https://www.xilinx.com/member/forms/download/design-license.html?cid=f11af463-30d6-4325-88f1-d5ee220bb0de&filename=rdf0382-zcu102-system-controller-c-2017-4.zip

Thanks
Harshit
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For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
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chrischan
Contributor
Contributor
2,068 Views
Registered: ‎06-20-2018

 I am seeing the same problem with Vivado 2018.3, try to read Power - Use Default Calibration - PS Side

Running sysc func: <interpINA226:0>
Error while running sysc function
Traceback (most recent call last):
File "testthread.py", line 537, in sysc
File "config.py", line 563, in interpINA226
ZeroDivisionError: float division by zero

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andresb
Xilinx Employee
Xilinx Employee
2,060 Views
Registered: ‎06-21-2018

Hi Chris,

That problem was fixed on the latest version of the BIT. 

On the folder \zcu102_bit\BoardUI\tests\ZCU102, there's a SC.yaml 

The first line has this comment:

# Version 1.1 08-14-18 Bradw Fix interpINA226 calls: need shunt resistor value. Passing 0 in most places got divide by 0 error.

Let me know if yours is different.

Thanks,
Andres

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chrischan
Contributor
Contributor
2,049 Views
Registered: ‎06-20-2018

Hi Andres,

I downloaded rdf0382-zcu102-system-controller-c-2018-3.zip  from https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html#documentation. I assummed that is the latest. I found SC.yaml in a different path than what you have shown, I found it at  \rdf0382-zcu102-system-controller-c-2018-3\zcu102_scui\tests\ZCU102. Opened SC.yaml and I don't see the comment that you had mentioned.

Thanks

Chris

 

 

 

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andresb
Xilinx Employee
Xilinx Employee
2,038 Views
Registered: ‎06-21-2018

Hi Chris,

Try with rdf0377-zcu102-bit-c-2018-3.zip  from the same documentation page and run BoardUI.exe. That one should have the right .yaml file.

Thanks,
Andres

 

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chrischan
Contributor
Contributor
2,031 Views
Registered: ‎06-20-2018

Hi Andres,

  Power Read worked fine with rdf0377-zcu102-bit-c-2018-3.zip but System Monitor is still having the same issue. See attached screen capture.

Thanks

Chris

 

sm.png
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andresb
Xilinx Employee
Xilinx Employee
2,026 Views
Registered: ‎06-21-2018

What is the issue?
Thanks,
Andres
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chrischan
Contributor
Contributor
2,013 Views
Registered: ‎06-20-2018

Sorry, sent you the wrong file. See attached

 

Chris

sm.png
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andresb
Xilinx Employee
Xilinx Employee
1,936 Views
Registered: ‎06-21-2018

Hi Chris,

That fails for me, too. I'll ask around, but it might take a few days to get a fix.

Thanks,
Andres

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1,713 Views
Registered: ‎09-05-2019

Hi Andres,

Did you finished to fix it?

Thanks.

Medhi

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timothyv
Xilinx Employee
Xilinx Employee
1,691 Views
Registered: ‎07-11-2019

Hello khoja.medhi@gmail.com

I suggest trying it on Vivado 2019.1 because it has worked for me. 

I have attached a screenshot of my results working on my machine using Vivado 2019.1

solution_2019.PNG

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marek.kvas
Observer
Observer
1,032 Views
Registered: ‎02-16-2017

@timothyv  ,

did it worked for power readings too? Your screenshot shows temperature readings only.

I noticed that at

https://www.xilinx.com/support/documentation-navigation/design-hubs/dh0036-zynq-ultrascale-plus-mpsoc-hub.html

where I would expect latest and greatest versions, there are at least two wersions of GUI:

rdf0382-zcu102-system-controller-c-2019-1.zip with incorrect SC.yaml file and

rdf0377-zcu102-bit-c-2019-1.zip with the corrected one.

I noticed this inconsistency thanks to @andresb comment earlier in this thread.

Unfortunately the one clearly refering to system controller is the buggy one which cost me some time to figure out. Can you have it fixed somehow?

Best regards

Marek

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andresb
Xilinx Employee
Xilinx Employee
1,013 Views
Registered: ‎06-21-2018

Hi Marek,

Usually, the place where to find the latest and greatest versions is the landing page for the board, not the Design Hub:
https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html#documentation

I'm sorry that this issue has cost you time. There's a Change Request to get it fixed (CR-1047802) but files haven't been updated yet.

Thanks,
Andres

marek.kvas
Observer
Observer
961 Views
Registered: ‎02-16-2017

Thanks @andresb ,

good to know. As design hubs are integrated into docnav(which is tool I really apreciate) I considered it somowhat prefered way.

Archives referenced in the design hub and from the landing page for the board are identical, and so both buggy.

Regards

Marek