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Registered: ‎02-22-2019

ZCU106 - 1G/2.5G Ethernet SGMII Transceiver locations

I want 5 instances of the 1G Ethernet SGMII core. I generated the IP core and used the generate statement in VHDL to generate 5 instances. But Vivado gives a synthesis warning regarding the transceiver locations.

[Vivado 12-2285] Cannot set LOC property of instance 'L_sgmii_pcs[1].sgmii_pcs/U0/pcs_pma_block_i/transceiver_inst/gig_ethernet_pcs_pma_0_gt_i/inst/gen_gtwizard_gthe4_top.gig_ethernet_pcs_pma_0_gt_gtwizard_gthe4_inst/gen_gtwizard_gthe4.gen_channel_container[0].gen_enabled_channel.gthe4_channel_wrapper_inst/channel_inst/gthe4_channel_gen.gen_gthe4_channel_inst[0].GTHE4_CHANNEL_PRIM_INST'... Instance L_sgmii_pcs[1].sgmii_pcs/U0/pcs_pma_block_i/transceiver_inst/gig_ethernet_pcs_pma_0_gt_i/inst/gen_gtwizard_gthe4_top.gig_ethernet_pcs_pma_0_gt_gtwizard_gthe4_inst/gen_gtwizard_gthe4.gen_channel_container[0].gen_enabled_channel.gthe4_channel_wrapper_inst/channel_inst/gthe4_channel_gen.gen_gthe4_channel_inst[0].GTHE4_CHANNEL_PRIM_INST can not be placed in GTHE4_CHANNEL of site GTHE4_CHANNEL_X0Y0 because the bel is occupied by L_sgmii_pcs[0].sgmii_pcs/U0/pcs_pma_block_i/transceiver_inst/gig_ethernet_pcs_pma_0_gt_i/inst/gen_gtwizard_gthe4_top.gig_ethernet_pcs_pma_0_gt_gtwizard_gthe4_inst/gen_gtwizard_gthe4.gen_channel_container[0].gen_enabled_channel.gthe4_channel_wrapper_inst/channel_inst/gthe4_channel_gen.gen_gthe4_channel_inst[0].GTHE4_CHANNEL_PRIM_INST(port:). This could be caused by bel constraint conflict ["d:/Xilinx_de/de_demo.srcs/sources_1/ip/gig_ethernet_pcs_pma_0/ip_0/synth/gig_ethernet_pcs_pma_0_gt.xdc":68]


Can I explicitly mention the five different transceiver locations in the constraints file for each instance or should I generate the core 5 times with different transceiver locations?

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