We want to used FMC connector in our design, FPGA on Magazine card, carrier card are 1Gbps LVDS ADC outputs.
By my understanding, FMC just a connector, we can define signals by ourselves, ANSI/VITA 57.1 give details signals definitions because it is the most optimized result. But not have 100% confidence, so here ask experts for help:
For our usage, some signals are not necessary, want to make some adaptions:
1) why some signals have direction? I know only DP... and clk signals have direction. what is the result if not follow it?
2) what is the difference between DP... and LA/HA...? I see the definitions, DP have better GND surrounding than LA/HA... and others?
3) Can DP pin be used as other low speed signals? Like I2C SPI? For example, in back A, use DP pins as I2C/SPI, even some GND as low speed signals?
4) for our usage, multi lanes ADC outputs skew need to be matched well. if we want to use DP with LA/HA together, LA/HA and DP will introduce different delay?
5) we want to route as more as FPGA IO pins to carrier card, so one HPC FMC not enough, we want to use 2, for the dimensions, can we use connectors as below picture show? I did not see this dimension in spec.